The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.
The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design con...
Computers are everywhere around us. We, for example, as air passengers, car drivers, laptop users with Internet connection, cell phone owners, hospital patients, inhabitants in the vicinity of a nuclear power station, students in a digital library or customers in a supermarket are dependent on their correct operation. Computers are incredibly fast, inexpensive and equipped with almost unimag- able large storage capacity. Up to 100 million transistors per chip are quite common today - a single transistor for each citizen of a large capital city in the world can be 2 easily accommodated on an...
Computers are everywhere around us. We, for example, as air passengers, car drivers, laptop users with Internet connection, cell phone owners, hospita...
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based...
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularl...
MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test...
MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cos...
The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a...
The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, ...
Wireless personal communications, or wireless as it is now being called, has arrived. The hype is starting to fade, and the hard work of deploying new systems and services for personal communications is underway. In the United States, the FCC propelled the wireless era from infancy to mainstream with a $7.7 billion auction of 60 MHz of radio spectrum in the 180011900 MHz band. With the largest single sale of public property in the history of mankind mostly complete, the resources of the entire world are being called upon to develop inexpensive, rapidly deployable wireless systems and sub...
Wireless personal communications, or wireless as it is now being called, has arrived. The hype is starting to fade, and the hard work of deploying new...
This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment...
This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualif...
System on Chip (SOC) having both digital and analog circuits has become increasingly prevalent in integrated circuit manufacturing industry. Electronic tests are classified as digital, analog and mixed signal. Current methodologies for the testing of digital circuits are well developed. In contrast, methodologies for the testing of analog circuits remain relatively underdeveloped due to the complex nature of analog signals. Compared to digital testing, analog testing lags far behind in methodologies and tools and therefore demands substantial research and development effort.
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System on Chip (SOC) having both digital and analog circuits has become increasingly prevalent in integrated circuit manufacturing industry. Electr...
Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, designers of next generation products must cope with reduced margin noises due to technological advances. The continuous evolution of the fabrication technology process of semiconductor components, in terms of transistor geometry shrinking, power supply, speed, and logic density, has significantly reduced the reliability of very deep submicron integrated circuits, in face of the various internal and external sources of noise. The very popular Field...
Fault-tolerance in integrated circuits is not an exclusive concern regarding space designers or highly-reliable application engineers. Rather, desi...
Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores. Besides...
Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and ...
