The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the...
The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with di...
Testing of Integrated Circuits is important to ensure the production of fault-free chips. However, testing is becoming cumbersome and expensive due to the increasing complexity of these ICs. Technology development has made it possible to produce chips where a complete system, with an enormous transistor count, operating at a high clock frequency, is placed on a single die - SOC (System-on-Chip). The device size miniaturization leads to new fault types, the increasing clock frequencies enforces testing for timing faults, and the increasing transistor count results in a higher number of...
Testing of Integrated Circuits is important to ensure the production of fault-free chips. However, testing is becoming cumbersome and expensive due...
Oscillation-Based Test in Mixed-Signal Circuits presents the development and experimental validation of the structural test strategy called Oscillation-Based Test OBT in short. The results here presented allow to assert, not only from a theoretical point of view, but also based on a wide experimental support, that OBT is an efficient defect-oriented test solution, complementing the existing functional test techniques for mixed-signal circuits.
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Oscillation-Based Test in Mixed-Signal Circuits presents the development and experimental validation of the structural test strategy called Oscilla...
A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from ...
System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity.
SOC (System-on-a-Chip) Testing for...
System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid a...
Design and test are considered jointly in this book since knowledge of one without the other is insufficient for the task of having high quality memories. Knowledge of memory design is required to understand test. An understanding of test is required to have effective built-in self-test implementations. A poor job can be done on any of these pieces resulting in a memory that passes test but which is not actually good. The relentless press of Moore's law drives more and more bits onto a single chip. The large number of bits means that methods that were "gotten away with" in the past will no...
Design and test are considered jointly in this book since knowledge of one without the other is insufficient for the task of having high quality me...
Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and railway traffic control, nuclear plant control, aircraft and car control) where a failure can be critical for the safety of human beings. Unfortunately, it is accepted that large digital systems cannot be fault-free. Some faults may be attributed to inaccuracy during the development, while others can come from external causes such as environmental stress. Radiations, electromagnetic interference and power glitches are some of the most common...
Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and ...
Standard - Test In. terface ____________________ Language So I was wrong. I was absolutely sure that by having an IEEE Standard defined, reviewed, and accepted, that I wouldn't need to write a book about it as well. The Standard would be the complete reference. And be aware - this book does not serve as a replacement to the IEEE Std. 1450 document. You should have a copy of the Standard as you go through this book. I realized that the Standard would not be the complete reference, about the time that the Working Group started to put notes into the draft proposa- notes to elaborate decisions in...
Standard - Test In. terface ____________________ Language So I was wrong. I was absolutely sure that by having an IEEE Standard defined, reviewed, and...
This book presents the basis for reusing the test vector generation and simulation for the purpose of implementation verification, to result in a significant timesaving. It brings the results in the direction of merging manufacturing test vector generation and verification.
This book presents the basis for reusing the test vector generation and simulation for the purpose of implementation verification, to result in a s...
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies...
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of st...
