This book contains more than the IEEE Standard 1149.4. It also contains the thoughts of those who developed the standard. Adam Osseiran has edited the original writings of Brian Wilkins, Colin Maunder, Rod Tulloss, Steve Sunter, Mani Soma, Keith Lofstrom and John McDermid, all of whom have personally contributed to this standard. To preserve the original spirit, only minor changes were made, and the reader will sense a chapter-to-chapter variation in the style of expression. This may appear awkward to some, although I found the Iack of monotonicity refreshing. A system consists of a specific...
This book contains more than the IEEE Standard 1149.4. It also contains the thoughts of those who developed the standard. Adam Osseiran has edited the...
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based...
Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularl...
Testing of Integrated Circuits is important to ensure the production of fault-free chips. However, testing is becoming cumbersome and expensive due to the increasing complexity of these ICs. Technology development has made it possible to produce chips where a complete system, with an enormous transistor count, operating at a high clock frequency, is placed on a single die - SOC (System-on-Chip). The device size miniaturization leads to new fault types, the increasing clock frequencies enforces testing for timing faults, and the increasing transistor count results in a higher number of...
Testing of Integrated Circuits is important to ensure the production of fault-free chips. However, testing is becoming cumbersome and expensive due...
System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity.
SOC (System-on-a-Chip) Testing for...
System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid a...
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature...
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. Wh...
Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and railway traffic control, nuclear plant control, aircraft and car control) where a failure can be critical for the safety of human beings. Unfortunately, it is accepted that large digital systems cannot be fault-free. Some faults may be attributed to inaccuracy during the development, while others can come from external causes such as environmental stress. Radiations, electromagnetic interference and power glitches are some of the most common...
Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and ...
1. DESIGN FLOW Integrated circuit (IC) complexity is steadily increasing. ICs incorporating hundreds of millions of transistors, mega-bit memories, complicated pipelined structures, etc., are now in high demand. For example, Intel Itanium II processor contains more than 200 million transistors, including a 3 MB third level cache. A billion transistor IC was said to be imminently doable by Intel fellow J. Crawford at Microprocessor Forum in October 2002 40]. Obviously, designing such complex circuits poses real challenges to engineers. Certainly, no relief comes from the competitive...
1. DESIGN FLOW Integrated circuit (IC) complexity is steadily increasing. ICs incorporating hundreds of millions of transistors, mega-bit memories, co...
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies...
Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of st...
Oscillation-Based Test in Mixed-Signal Circuits presents the development and experimental validation of the structural test strategy called Oscillation-Based Test OBT in short. The results here presented allow to assert, not only from a theoretical point of view, but also based on a wide experimental support, that OBT is an efficient defect-oriented test solution, complementing the existing functional test techniques for mixed-signal circuits.
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Oscillation-Based Test in Mixed-Signal Circuits presents the development and experimental validation of the structural test strategy called Oscilla...
Written by a team of two leading experts and two very successful young former PhD students, New Methods of Concurrent Checking describes new methods of concurrent checking, such as partial duplication, use of output dependencies, complementary circuits, self-dual parity, self-dual duplication and others. A special chapter demonstrates how the new general methods of concurrent checking can be more specifically applied to regular structures to obtain optimum results. This is exemplified for all types of adders up to 64 bits with a level of detail never before presented in the literature. The...
Written by a team of two leading experts and two very successful young former PhD students, New Methods of Concurrent Checking describes new methods o...
