Kategoria BISAC: Technology & Engineering >> Electronics - Circuits - General

Effective Functional Verification is organized into 4 parts. The first part contains 3 chapters designed appeal to newcomers and experienced people to the field. There is a survey of various verification methodologies and a discussion of them.

The second part with 3 chapters is targeted towards people in management and higher up on the experience ladders. New verification engineers reading these chapters learn what is expected and how things work in verification. Some case studies are also presented with analysis of proposed improvements.

The last two parts...

This is a new type of edited volume in the Frontiers in Electronic Testing book series devoted to recent advances in electronic circuits testing. The book is a comprehensive elaboration on important topics which capture major research and development efforts today. "Hot" topics of current interest to test technology community have been selected, and the authors are key contributors in the corresponding topics.

This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow. The subjects covered include an explanation of why the problem of congestion is important and how it will trend, plus definitions of metrics that are appropriate for measuring...

Analog and mixed signal integrated systems of today and tomorrow will be very complex, as they meet the challenge and increased demand for higher levels of integration in a System on Chip (SoC). Current and future trends call for pushing system integration to the highest levels in order to achieve low cost and low power for large volume products in the consumer and telecom markets, such as feature-rich handheld battery-operated devices. In today s analog design environment, a fully integrated CMOS SoC design may require several silicon spins before it meets all product specifications and...

Digital phase lock loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless...

Ultra-low voltage large-scale integrated circuits (LSIs) in nano-scale technologies are needed to:

-Meet the needs of a rapidly growing mobile cell phone market
-Offset a significant increase in the power dissipation of high-end microprocessor units.

Low power large capacity memories are a necessary component of low voltage LSIs. Many challenges arise in the process of achieving such memories as their devices and voltages are scaled down below 100nm and sub-1-V. A high signal-to-noise (S/N) ratio design is necessary to deal with small signal voltages from low-voltage...

The Problem of the Unknown Component: Theory and Applications addresses the issue of designing a component that, combined with a known part of a system, conforms to an overall specification. The authors tackle this problem by solving abstract equations over a language. The most general solutions are studied when both synchronous and parallel composition operators are used. The abstract equations are specialized to languages associated with important classes of automata used for modeling systems.

The book is a blend of theory and practice, which includes a description of a...

Arranged in a format that follows the industry-common ASIC physical design flow, Physical Design Essentials begins with general concepts of an ASIC library, then examines floorplanning, placement, routing, verification, and finally, testing.

Among the topics covered are Basic standard cell design, transistor-sizing, and layout styles; Linear, non-linear, and polynomial characterization; Physical design constraints and floorplanning styles; Algorithms used for placement; Clock Tree Synthesis; Parasitic extraction; Electronic Testing, and many more.

Silicon Devices and Process Integration covers state-of-the-art silicon devices, their characteristics, and their interactions with process parameters. It serves as a comprehensive guide which addresses both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. The book is compiled from the author s industrial and academic lecture notes and reflects years of experience in the development of silicon devices.

Features include:

• A review of silicon...

Dynamics of Microelectromechanical Systems is a systematic overview of the dynamics of MEMS (microelectromechanical systems), microstructures, and their responses. The focus is on the mecahnical/structural micro domain and the compliant nature of mechanical transmission.

Features of this work include:

• An in-depth treatment of problems that involve reliable modeling, analysis and design,
• Analytical models with correct dependences on service dimensions,
• Cantilever based systems for nanofabrication researchers and...

Lately, there has been a growing interest in exploiting the benefits of the ICs for areas outside of the traditional application spaces. One noteable area is found in biology Bioanalytical instruments have been miniaturized on ICs to study various biophenomena or to actuate biosystems. These biolab-on-IC systems utilize the IC to facilitate faster, repeatable, and standardized biological experiments at low cost with a small volume of biological sample. The research activities in this field are expected to enjoy substantial growth in the foreseeable future. BioCMOS Technologies reviews...

Verification Projects: Planning to Closure addresses the challenges of functional verification in the digital semiconductor market today. It presents best practices by alternately looking at the verification problem as a complete system, and expounding on the best practices for executing with the myriad of available verification technologies. As a result, the reader gains not only a sufficient knowledge to use each technology intelligently, but more importantly, knowledge of when each technology can be used most effectively, and how to combine the various...