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Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to...

In recent years, with the advent of ?ne line lithographical methods, molecular beam epitaxy, organometallic vapour phase epitaxy and other experimental techniques, low dimensional structures having quantum con?nement in one, two and three dimensions (such as inversion layers, ultrathin ?lms, nipi s, quantum well superlattices, quantum wires, quantum wire superlattices, and quantum dots together with quantum con?ned structures aided by various other ?elds) have attracted much attention, not only for their potential in uncovering new phenomena in nanoscience, but also for their interesting...

In recent years, with the advent of ?ne line lithographical methods, molecular beam epitaxy, organometallic vapour phase epitaxy and other experimental techniques, low dimensional structures having quantum con?nement in one, two and three dimensions (such as inversion layers, ultrathin ?lms, nipi s, quantum well superlattices, quantum wires, quantum wire superlattices, and quantum dots together with quantum con?ned structures aided by various other ?elds) have attracted much attention, not only for their potential in uncovering new phenomena in nanoscience, but also for their interesting...