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wyszukanych pozycji: 11
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Timing Analysis and Optimization of Sequential Circuits
ISBN: 9780792383215 / Angielski / Twarda / 1998 / 190 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems.
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to... Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques t...
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cena:
384,63 zł |
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Timing
ISBN: 9781441954084 / Angielski / Miękka / 2010 / 294 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Statistical timing analysis is an area of growing importance in nanometer te- nologies as the uncertainties associated with process and environmental var- tions increase and this chapter has captured some of the major efforts in this area. This remains a very active field of research and there is likely to be a great deal of new research to be found in conferences and journals after this book is published. In addition to the statistical analysis of combinational circuits a good deal of work has been carried out in analyzing the effect of variations on clock skew. Although we will not treat...
Statistical timing analysis is an area of growing importance in nanometer te- nologies as the uncertainties associated with process and environmental ...
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cena:
692,36 zł |
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Encyclopedia of Thermal Packaging, Set 2: Thermal Packaging Tools - Volume 4: Thermally-Informed Design of Microelectronic Components
ISBN: 9789814583435 / Angielski / Twarda / 2014 Termin realizacji zamówienia: ok. 22 dni roboczych. This Encyclopedia comes in 3 sets. To check out Set 1 and Set 3, please visit Set 1: Thermal Packaging Techniques and Set 3: Thermal Packaging Applications /remove Thermal and mechanical packaging - the enabling technologies for the physical implementation of electronic systems - are responsible for much of the progress in miniaturization, reliability, and functional density achieved by electronic, microelectronic, and nanoelectronic products during the past 50 years. The inherent inefficiency of electronic devices and their sensitivity to heat have placed thermal packaging on the critical...
This Encyclopedia comes in 3 sets. To check out Set 1 and Set 3, please visit Set 1: Thermal Packaging Techniques and Set 3: Thermal Packaging Applica...
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cena:
1143,33 zł |
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Design Automation for Timing-Driven Layout Synthesis
ISBN: 9780792392811 / Angielski / Twarda / 1992 / 269 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Moore's law Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of years. Only recently has the level of integration be- gun to slow down somewhat due to the physical limits of integration technology. Advances in silicon technology have allowed Ie design- ers to integrate more than a few million transistors on a chip; even a whole system of moderate complexity can now be implemented on a single chip. To keep pace with the increasing complexity in very large scale integrated (VLSI) circuits, the productivity of...
Moore's law Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of ...
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cena:
576,96 zł |
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Timing
ISBN: 9781402076718 / Angielski / Twarda / 2004 / 294 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Statistical timing analysis is an area of growing importance in nanometer te- nologies' as the uncertainties associated with process and environmental var- tions increase' and this chapter has captured some of the major efforts in this area. This remains a very active field of research' and there is likely to be a great deal of new research to be found in conferences and journals after this book is published. In addition to the statistical analysis of combinational circuits' a good deal of work has been carried out in analyzing the effect of variations on clock skew. Although we will not...
Statistical timing analysis is an area of growing importance in nanometer te- nologies' as the uncertainties associated with process and environmental...
|
cena:
692,36 zł |
 |
Timing Analysis and Optimization of Sequential Circuits
ISBN: 9781461375791 / Angielski / Miękka / 2012 / 190 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems.
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to... Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques t...
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cena:
384,63 zł |
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Design Automation for Timing-Driven Layout Synthesis
ISBN: 9781461363934 / Angielski / Miękka / 2012 / 269 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Moore's law Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of years. Only recently has the level of integration be- gun to slow down somewhat due to the physical limits of integration technology. Advances in silicon technology have allowed Ie design- ers to integrate more than a few million transistors on a chip; even a whole system of moderate complexity can now be implemented on a single chip. To keep pace with the increasing complexity in very large scale integrated (VLSI) circuits, the productivity of...
Moore's law Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of ...
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cena:
576,96 zł |
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Designing Digital Computer Systems with Verilog
ISBN: 9780521045728 / Angielski / Miękka / 2007 / 176 str. Termin realizacji zamówienia: ok. 13-18 dni roboczych. Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. Aft...
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cena:
368,80 zł |
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Designing Digital Computer Systems with Verilog
ISBN: 9780521828666 / Angielski / Twarda / 2005 / 176 str. Termin realizacji zamówienia: ok. 16-18 dni roboczych. Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. Aft...
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cena:
247,55 zł |
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Handbook of Algorithms for Physical Design Automation
ISBN: 9780367403478 / Angielski / Miękka / 2019 / 1044 str. Termin realizacji zamówienia: ok. 16-18 dni roboczych. |
cena:
296,17 zł |
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Layout Optimization in VLSI Design
ISBN: 9781441952066 / Angielski / Miękka / 2010 / 288 str. Termin realizacji zamówienia: ok. 20 dni roboczych. Introduction The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as inter connect delay, noise and crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout opti mization problems emerging with the advent of very deep submicron technologies in semiconductor processing. We hope that it will stimulate more people to...
Introduction The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such a...
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cena:
576,96 zł |
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