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In recent years, low power design has become one of the focuses of digital VLSI circuits. As technology scales, leakage currents in contemporary CMOS logic have become one of the main power consumers. Contrary to conventional methods for power reduction, operation of digital circuits in the subthreshold region minimizes power consumption in low-frequency systems. This book presents pre-layout and post-layout simulations of existing 8T Latch and proposed latch designs in sub-threshold region. The proposed circuits consist of pass transistor gate logic. Proposed designs are area efficient so...

The advancement of CMOS technologies paved the road for a growing market of mobile and portable electronic devices. This growth is driven by the continual integration of complex analog and digital building blocks on a single chip, so silicon area and power consumption are the two most valued aspects of the design. Compared to static CMOS logic, dynamic logic offers good performance. Wide fan-in logic such as domino circuits is used in high-performance applications. Dynamic domino logic circuits are widely used in modern digital VLSI circuits. These dynamic circuits are often favored in high...