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Towards a Design Flow for Reversible Logic
ISBN: 9789048195787 / Angielski / Twarda / 184 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. The development of computing machines found great success in the last decades. But the ongoing miniaturization of integrated circuits will reach its limits in the near future. Shrinking transistor sizes and power dissipation are the major barriers in the development of smaller and more powerful circuits. Reversible logic provides an alternative that may overcome many of these problems in the future. For low-power design, reversible logic offers significant advantages since zero power dissipation will only be possible if computation is reversible. Furthermore, quantum computation profits from...
The development of computing machines found great success in the last decades. But the ongoing miniaturization of integrated circuits will reach its l...
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Fields of Logic and Computation: Essays Dedicated to Yuri Gurevich on the Occasion of His 70th Birthday
ISBN: 9783642150241 / Angielski / Miękka / 627 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Yuri Gurevich has played a major role in the discovery and development of - plications of mathematical logic to theoretical and practical computer science. His interests have spanned a broad spectrum of subjects, including decision p- cedures, the monadic theory of order, abstract state machines, formal methods, foundations of computer science, security, and much more. In May 2010, Yuri celebrated his 70th birthday. To mark that occasion, on August 22, 2010, a symposium was held in Brno, the Czech Republic, as a sat- lite event of the 35th International Symposium on Mathematical Foundations...
Yuri Gurevich has played a major role in the discovery and development of - plications of mathematical logic to theoretical and practical computer sci...
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Interactive Theorem Proving: First International Conference, Itp 2010 Edinburgh, Uk, July 11-14, 2010, Proceedings
ISBN: 9783642140518 / Angielski / Miękka / 495 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. This volume contains the papers presented at ITP 2010: the First International ConferenceonInteractiveTheoremProving. It washeldduring July11-14,2010 in Edinburgh, Scotland as part of the Federated Logic Conference (FLoC, July 9-21, 2010) alongside the other FLoC conferences and workshops. ITP combines the communities of two venerable meetings: the TPHOLs c- ference and the ACL2 workshop. The former conference originated in 1988 as a workshop for users of the HOL proof assistant. The ?rst two meetings were at the University of Cambridge, but afterwards they were held in a variety of venues....
This volume contains the papers presented at ITP 2010: the First International ConferenceonInteractiveTheoremProving. It washeldduring July11-14,2010 ...
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Computer Aided Verification: 22nd International Conference, Cav 2010, Edinburgh, Uk, July 15-19, 2010, Proceedings
ISBN: 9783642142949 / Angielski / Miękka / 676 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. This volume contains the proceedings of the 22nd International Conference on Computer-Aided Veri?cation (CAV) held in Edinburgh, UK, July 15-19 2010. CAV is dedicated to the advancement of the theory and practice of comput- assistedformalanalysismethods forsoftwareandhardwaresystems.Theconf- ence covers the spectrum from theoretical results to concrete applications, with an emphasis on practical veri?cation tools and the algorithms and techniques that are needed for their implementation. We received 145 submissions: 101 submissions of regular papers and 44 s- missions of tool papers. These...
This volume contains the proceedings of the 22nd International Conference on Computer-Aided Veri?cation (CAV) held in Edinburgh, UK, July 15-19 2010. ...
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Current Sense Amplifiers for Embedded Sram in High-Performance System-On-A-Chip Designs
ISBN: 9783540002987 / Angielski / Twarda / 164 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value semiconductor products. As the technology scales towards smaller feature sizes and chips grow larger, a speed limitation arises due to an in- creased RC delay associated with interconnection wires. Innovative circuit techniques are required to achieve the speed needed for high-performance signal processing. Current sensing is considered as a promising circuit class since it is inherently faster than conventional voltage sense amplifiers. How- ever, especially in SRAM, current sensing has rarely been used so...
System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value semiconductor products. As the technology scales towards smaller ...
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Memory Design Techniques for Low Energy Embedded Systems
ISBN: 9781441949530 / Angielski / Miękka / 144 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. The proliferation of embedded systems, and the corresponding new chip and chip set designs, have brought additional attention to storage units. Indeed, the heterogeneity of components and structures within embedded systems and the possibility of using application-specific storage systems has added a new dimension to memory system design. Moreover, new degrees of freedom have been opened since the introduction of embedded memory arrays in different technologies, such as SRAMs, DRAMs and EEPROMs and Flash, and their realization on the same silicon substate hosting processing units.
Embedded... The proliferation of embedded systems, and the corresponding new chip and chip set designs, have brought additional attention to storage units. Indeed...
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Towards One-Pass Synthesis
ISBN: 9781441952790 / Angielski / Miękka / 182 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e. g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits...
The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the comp...
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Modern Placement Techniques
ISBN: 9781441953094 / Angielski / Miękka / 190 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Modern Placement Techniques explains physical design and VLSI/CAD placement to the professional engineer and engineering student. Along with explaining the problems that are associated with placement, the book gives an overview of existing placement algorithms, techniques and methodologies. Modern Placement Techniques emphasizes recent advances in addressing the placement problem, including congestion-driven, timing driven, mixed macro-cell and standard cell placement.
The book presents the Dragon placement tool, with detailed algorithm descriptions for... Modern Placement Techniques explains physical design and VLSI/CAD placement to the professional engineer and engineering student. Alo...
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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard
ISBN: 9781441953155 / Angielski / Miękka / 178 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature... Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. Wh... |
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Noise Analysis of Radio Frequency Circuits
ISBN: 9781441954046 / Angielski / Miękka / 184 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. In high speed communications and signal processing applications, random electrical noise that emanates from devices has a direct impact on critical high level specifications, for instance, system bit error rate or signal to noise ratio. Hence, predicting noise in RF systems at the design stage is extremely important. Additionally, with the growing complexity of modern RF systems, a flat transistor-level noise analysis for the entire system is becoming increasingly difficult. Hence accurate modelling at the component level and behavioural level simulation techniques are also becoming...
In high speed communications and signal processing applications, random electrical noise that emanates from devices has a direct impact on critical hi...
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Leveraging Applications of Formal Methods, Verification, and Validation: 4th International Symposium on Leveraging Applications, Isola 2010, Heraklion
ISBN: 9783642165573 / Angielski / Miękka / 708 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Constitutes the refereed proceedings of the 4th International Symposium on Leveraging Applications of Formal Methods, ISoLA 2010, held in Heraklion, Crete, Greece, in October 2010.
Constitutes the refereed proceedings of the 4th International Symposium on Leveraging Applications of Formal Methods, ISoLA 2010, held in Heraklion, C...
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Fault Diagnosis and Fault Tolerance: A Systematic Approach to Special Topics
ISBN: 9783540549628 / Angielski / Miękka / 197 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran ce have become more important than before, and hence reveal a lot of interest ing topics which attract many researchers to make a great number of contribu tions to this field. In recent years, many new and significant results have been achieved. A quick scan over the proceedings of the conferences on fault tolerant computing and design automation as well as on testing will convince the reader of that. But unfortunately these achievements...
With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault t...
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Evolutionary Algorithms for VLSI CAD
ISBN: 9781441950406 / Angielski / Miękka / 184 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. In VLSI CAD, difficult optimization problems have to be solved on a constant basis. Various optimization techniques have been proposed in the past. While some of these methods have been shown to work well in applications and have become somewhat established over the years, other techniques have been ignored.
Recently, there has been a growing interest in optimization algorithms based on principles observed in nature, termed Evolutionary Algorithms (EAs). Evolutionary Algorithms in VLSI CAD presents the basic concepts of EAs, and considers the application of EAs in VLSI... In VLSI CAD, difficult optimization problems have to be solved on a constant basis. Various optimization techniques have been proposed in the past. Wh...
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A Roadmap for Formal Property Verification
ISBN: 9789048171859 / Angielski / Miękka / 252 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properties? Have I written a consistent set of properties? What should I do when the FPV tool runs into capacity issues? This book develops the answers to these questions and fits them into a roadmap for formal property verification a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples you do not need any... Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properti... |
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Logic Circuit Design: Selected Methods
ISBN: 9783642276569 / Angielski / Twarda / 258 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard. In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memo... |
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Hardware Evolution: Automatic Design of Electronic Circuits in Reconfigurable Hardware by Artificial Evolution
ISBN: 9781447134169 / Angielski / Miękka / 117 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. Evolution through natural selection has been going on for a very long time. Evolution through artificial selection has been practiced by humans for a large part of our history, in the breeding of plants and livestock. Artificial evolution, where we evolve an artifact through artificial selection, has been around since electronic computers became common: about 30 years. Right from the beginning, people have suggested using artificial evolution to design electronics automatically.l Only recently, though, have suitable re configurable silicon chips become available that make it easy for...
Evolution through natural selection has been going on for a very long time. Evolution through artificial selection has been practiced by humans for a ...
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Current Trends in Hardware Verification and Automated Theorem Proving
ISBN: 9781461281955 / Angielski / Miękka / 489 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. This report describes the partially completed correctness proof of the Viper 'block model'. Viper 7,8,9,11,23] is a microprocessor designed by W. J. Cullyer, C. Pygott and J. Kershaw at the Royal Signals and Radar Establishment in Malvern, England, (henceforth 'RSRE') for use in safety-critical applications such as civil aviation and nuclear power plant control. It is currently finding uses in areas such as the de ployment of weapons from tactical aircraft. To support safety-critical applications, Viper has a particulary simple design about which it is relatively easy to reason using current...
This report describes the partially completed correctness proof of the Viper 'block model'. Viper 7,8,9,11,23] is a microprocessor designed by W. J. ...
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Logic, Algebra, and Computation: International Summer School
ISBN: 9783642768019 / Angielski / Miękka / 485 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. The Marktoberdorf Summer Schools on Informatics were started in 1970, with the intention to convene every second or third year a group of top researchers in computing, devoted to preach their most recent results to an elite of advanced students - young and most promising people - and prepared to stand their questions, criticism and suggestions. The themes of these Advanced Study In stitutes under the sponsorship of the NATO Scientific Affairs Division varied slightly over the years, oscillating more or less around Programming Methodo logy, as the following list shows: 1970 Data Structures and...
The Marktoberdorf Summer Schools on Informatics were started in 1970, with the intention to convene every second or third year a group of top research...
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Data Types and Persistence
ISBN: 9783642648700 / Angielski / Miękka / 294 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. There is a growing interest in integrating databases and programming languages. In recent years the programming language community has developed new models of computation such as logic programming, object-oriented programming and functional programming, to add to the well established von Neumann model. The data base community has almost independently developed more and more sophisticated data models to solve the problems of large scale data organisation. To make use of these new models in programming languages there must be an awareness of the problems of large scale data. The data base...
There is a growing interest in integrating databases and programming languages. In recent years the programming language community has developed new m...
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Defect and Fault Tolerance in VLSI Systems: Volume 1
ISBN: 9781461568018 / Angielski / Miękka / 362 str. Termin realizacji zamówienia: ok. 5-8 dni roboczych. This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-7, 1988 in Springfield, Massachusetts. Our thanks go to all the contributors and especially the members of the program committee for the difficult and time-consuming work involved in selecting the papers that were presented in the workshop and reviewing the papers included in this book. Thanks are also due to the IEEE Computer Society (in particular, the Technical Committee on Fault-Tolerant Computing and the Technical Committee on VLSI) and the...
This book contains an edited selection of papers presented at the International Workshop on Defect and Fault Tolerance in VLSI Systems held October 6-...
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402,53 |
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