Over the past decade, reducing the dynamic switching power was the main focus in many of the proposed low-power circuit techniques. At that time, the off-state leakage power was negligible compared to dynamic power. However, as technology scales into the deep-submicron regime, the increase in leakage power can no longer be neglected. Soon, the biggest challenge that SoC designers must resolve is the fact that transistors for digital and memory circuits will be more and more leaky as technology generations advance. The semiconductor industry must therefore reduce leakage current in chip...
Over the past decade, reducing the dynamic switching power was the main focus in many of the proposed low-power circuit techniques. At that time, the ...
Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.
Low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form...
Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with pow...
This excellent survey of state-of-the-art techniques discusses the MTCMOS technology that has emerged as an increasingly popular technique to control the escalating leakage power, while maintaining high performance. It addresses the leakage problem in a number of designs for combinational, sequential, dynamic and current-steering logic.
This excellent survey of state-of-the-art techniques discusses the MTCMOS technology that has emerged as an increasingly popular technique to contr...
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density. With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power.
This bookis an invaluable...
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensi...
This book introduces readers from diverse backgrounds to the principles underlying nanotechnology, from devices to systems, while also describing in detail how businesses can use nanotechnology to redesign their products and processes, in order to have a clear edge over their competition. The authors include 75 case studies, describing in a highly-accessible manner, real nanotechnology innovations from 15 different industrial sectors. For each case study, the technology or business challenges faced by the company are highlighted, the type of nanotechnology adopted is defined, and the eventual...
This book introduces readers from diverse backgrounds to the principles underlying nanotechnology, from devices to systems, while also describing in d...
