Statistical Analysis and Optimization For VLSI: Timing and Power is a state-of-the-art book on the newly emerging field of statistical computer-aided design (CAD) tools. The very latest research in statistical timing and power analysis techniques is included, along with efforts to incorporate parametric yield as the key objective function during the design process. Included is the necessary mathematical background on techniques which find widespread use in current analysis and optimization. The emphasis is on algorithms, modeling approaches for process variability, and statistical...
Statistical Analysis and Optimization For VLSI: Timing and Power is a state-of-the-art book on the newly emerging field of statistical computer-aid...
Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authors' long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher...
Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and dev...
In DSP Architecture Design Essentials, authors Dejan Markovic and Robert W. Brodersen cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way.
The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as...
In DSP Architecture Design Essentials, authors Dejan Markovic and Robert W. Brodersen cover a key subject for the successful realization of ...
This book is written for academic and professional researchers designing communication systems for pervasive and low power applications. There is an introduction to wireless sensor networks, but the main emphasis of the book is on design techniques for low power, highly integrated transceivers. Instead of presenting a single design perspective, this book presents the design philosophies from three diverse research groups, providing three completely different strategies for achieving similar goals. By presenting diverse perspectives, this book prepares the reader for the countless design...
This book is written for academic and professional researchers designing communication systems for pervasive and low power applications. There is a...
Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe such] a] low-power methodology with a practical, step-by-step approach.
Richard Goering, Software Editor, EE Times
Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition...
Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the foo...
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is...
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of tran...
In Thermal and Power Management of Integrated Circuits, power and thermal management issues in integrated circuits during normal operating conditions and stress operating conditions are addressed. Thermal management in VLSI circuits is becoming an integral part of the design, test, and manufacturing. Proper thermal management is the key to achieve high performance, quality and reliability. Performance and reliability of integrated circuits are strong functions of the junction temperature. A small increase in junction temperature may result in significant reduction in the device...
In Thermal and Power Management of Integrated Circuits, power and thermal management issues in integrated circuits during normal operating conditio...
Microprocessors of today contain close to a billion transistors, while achieving the performance of super-computers just a decade ago. Designing such processors takes hundreds of people organized into large teams. High Performance Energy Efficient Microprocessor Design is written by the world s most prominent microprocessor design leaders from the industry and academia. It provides a complete coverage of all the aspects of a complex microprocessor design process from technology, power management, clocking, high-performance architecture, design methodologies, memory and I/O design, computer...
Microprocessors of today contain close to a billion transistors, while achieving the performance of super-computers just a decade ago. Designing su...
With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergence, performance, and yield, and complicating the synthesis of critical interc- nects. The problem is especially acute as interconnects are becoming the performance bottleneck in modern integrated circuits. Even with more than 30% of white space, some of the design blocks in modern microprocessor and ASIC designs cannot be routed successfully. Moreover, this problem is likely to worsen considerably in the coming years due to design size and...
With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergenc...
Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one...
Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in...
