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The first accessible, comprehensive treatment of synchronization in digital communications, this two-volume work places an emphasis on applications rather than mathematics.

Discussing both narrowband and wideband synchronizers in a unified framework, this text covers Jitter accumulation in digital networks and treats LANs as well as public network issues. Much of the material is based on research performed by the authors while working with the IBM Research Lab in Zurich on the token ring project. The structure of carrier synchronizers for suppresses carrier signals is developed. Finally, digital signal processing algorithms for carrier/symbol synchronization suitable for VSLI implementation are introduced and analyzed.

After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of...

After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of...