Reuse Methodology Manual for System-On-A-Chip Designs

ISBN-13: 9780792385585 / Angielski / Twarda / 1999 / 286 str.

Michael Keating; Pierre Bricaud

Opis

Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology not only promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the vast numbers of gates now available.