RF Power Amplifiers for Mobile Communications

ISBN-13: 9789048172863 / Angielski / Miękka / 2010 / 250 str.

Patrick Reynaert; Michiel Steyaert

Opis

RF Power Amplifiers for Mobile Communications fits in the quest for fully integrated CMOS transceivers. The book tackles both high efficiency and high linearity PA design in low-voltage CMOS, and has a strong emphasis on theory, design and implementation. The book is conceived as a design guide for those actively involved in the design of CMOS wireless transceivers. RF Power Amplifiers for Mobile Communications starts from the basic theory of power amplification from the viewpoint of CMOS integration. The design of switching RF power amplifiers in CMOS is explored and CMOS PA design at low supply voltage using parallel amplification is discussed. Combining both efficiency and linearity is one of the major issues in CMOS PA design for wireless and mobile communications and is subsequently tackled. Different linearization techniques and approaches are discussed and polar modulation is clarified in greater detail. Finally, two CMOS PA implementations are thoroughly covered. RF Power Amplifiers for Mobile Communications offers the reader an intuitive insight in Power Amplification as well as the necessary mathematical background. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.

Spis treści

Preface. 1. INTRODUCTION. 1.1 Wireless Communication. 1.2 CMOS Technology and Scaling. 1.2.1 Moore’s Law. 1.2.2 RF-CMOS: Moore meets Marconi. 1.3 The ResearchWork. 1.4 Outline of the Work. 2. MOBILE COMMUNICATION SYSTEMS AND POWER AMPLIFICATION. 2.1 Introduction. 2.2 Mobile Communication Systems. 2.2.1 Modulated Bandpass Signals. 2.2.2 Digital Modulation. 2.2.3 Probability Density Function of the Envelope Signal. 2.3 Some Aspects of Power Amplification. 2.3.1 Output Power. 2.3.2 Peak Output Power and Crest Factor. 2.3.3 Input Power and Power Gain. 2.3.4 Efficiency. 2.3.5 Efficiency and Modulated Signals. 2.3.6 Power Control. 2.3.7 Linearity. 2.3.8 Inductors, Capacitors and Quality Factor. 2.4 Power Amplifier Classification. 2.4.1 Class A. 2.4.2 Reduced Conduction Angle: Class AB, B and C. 2.4.3 Saturated Class A. 2.4.4 Harmonic Tuning for Improved Efficiency: Class F. 2.4.5 Switching Amplifiers. 2.4.6 Class D. 2.4.7 Class E. 2.4.8 Reliability. 2.5 Efficiency and Linearity. 2.5.1 Efficiency Improvement of Linear Amplifiers. 2.5.2 Linearization of Nonlinear Amplifiers. 2.6 Conclusion. 3. ANALYSIS AND DESIGN OF THE CLASS E POWER AMPLIFIER IN CMOS. 3.1 Introduction. 3.2 A Theoretical Study of the Class E Amplifier. 3.2.1 The Class E Requirements. 3.2.2 Existing Methods to Solve the Class E Equations. 3.2.3 A State-Space Model of the Class E Power Amplifier. 3.2.4 Limitations of the State-Space Approach. 3.3 Design of the Class E Amplifier in CMOS. 3.3.1 Design of the Load Resistor. 3.3.2 Design of the DC-feed Inductance. 3.3.3 Design of the nMOS switch. 3.3.4 Technology Scaling. 3.3.5 Device Stacking. 3.3.6 Increasing the Operating Frequency. 3.3.7 Deviation from Class E: Class BE. 3.4 CMOS Layout Aspects. 3.4.1 Integrated Inductors. 3.4.2 Decoupling and Bondwires. 3.5 Conclusion. 4. IMPEDANCE TRANSFORMATION AND POWER COMBINATION. 4.1 Introduction.4.2 L-match Impedance Transformation. 4.2.1 Basic Equations. 4.2.2 Inductor Loss and Efficiency. 4.3 Power Combination. 4.3.1 Basic Equations. 4.3.2 Inductor Loss and Efficiency. 4.3.3 Multi Section Lattice-Type LC Balun. 4.3.4 Power Control. 4.3.5 Multi Section LC Balun with Non-Identical Sections. 4.3.6 Merging the Class E Amplifier and the LC Balun. 4.4 Conclusion. 5. POLAR MODULATION. 5.1 Introduction. 5.2 The Polar Modulation Architecture. 5.2.1 Basic Equations. 5.2.2 Envelope Elimination and Restoration. 5.2.3 Influence of the Driver Stages on the Overall Efficiency. 5.2.4 Implementation of the Amplitude Modulator. 5.3 Distortion in a Polar Modulated Power Amplifier. 5.3.1 Nonlinear Polar Modulated Power Amplifier Models. 5.3.2 Feedforward. 5.3.3 Nonlinear on-resistance. 5.3.4 Nonlinear drain-bulk junction capacitance. 5.3.5 Differential Delay. 5.3.6 Envelope Filtering. 5.3.7 Injection of the Phase Signal. 5.3.8 Linearity Improvement Techniques. 5.4 Power Combination and Polar Modulation. 5.5 Full Digital Linearization. 5.5.1 A single-bit RF D-to-A. 5.5.2 The Lattice-type LC balun as a multi-bit RF D-to-A. 5.6 Conclusion. 6. A CMOS POWER AMPLIFIER FOR GSM-EDGE. 6.1 Introduction. 6.2 The EDGE System. 6.2.1 Enhanced Datarates for GSM Evolution. 6.2.2 Generation of the EDGE Signal. 6.2.3 EDGE Transmitter Linearity Requirements. 6.2.4 EDGE Transmitter Output Power Requirements. 6.3 A Polar Modulated Power Amplifier for EDGE. 6.3.1 Architecture. 6.3.2 Distortion. 6.4 Circuit Implementation. 6.4.1 Design of the RF amplifier. 6.4.2 Design of the Linear Amplitude Modulator. 6.4.3 Layout Aspects. 6.5 Measurements. 6.5.1 Measurement Setup. 6.5.2 Constant Envelope Measurements. 6.5.3 AM-AM and AM-PM Distortion Measurement. 6.5.4 EDGE Measurements. 6.5.5 16-QAM Modulation and Two-Tone Test. 6.6 Architectural Improvements. 6.7 Comparison with Other EDGE Solutions. 6.8 Conclusion. 7. A CMOS POWER AMPLIFIER

O autorze

Prof. Michiel Steyaert received his Ph.D. degree in electronics from the Katholieke Universiteit Leuven (KUL) in June 1987. In 1988 he was an associated assistant professor at the U.C.L.A. From 1989 he joined the ESAT-MICAS group at the KUL, were he is now a Full Professor. His current research interests are in analog integrated circuits for high-frequency telecommunication systems and high performance analog signal processing. He authored or co-authored over 250 papers and co-authored over 5 books. He received the 1990 European Solid-State Circuits Conference Best Paper Award, the 1995 and 1997 ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and the 1991 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications.