Embedded Memory Design for Multi-Core and Systems on Chip

ISBN-13: 9781461488804 / Angielski / Twarda / 2013 / 95 str.

Baker Mohammad

Opis

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

Spis treści

Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.

Blurb

This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

 ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices;

·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design;

·         Includes detailed discussion of memory hierarchy and its impact on energy and performance;

·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.