Continuing to scale down the transistor size makes the adoption of high-k gate dielectrics and metal electrodes necessary. However, there are still a lot of problems with high-k transistors such as Fermi-level pinning (FLP), which affects flatband voltage Vfb and threshold voltages (Vth) directly. This book summarizes three FLP mechanisms in gate stacks with high-k dielectrics and metal electrodes a dipole formation through (1) the mechanism of oxygen vacancy formation in a high-k dielectric layer; (2) the hybridization between a metal gate and a high-k dielectric layer; and (3) the...