Continued miniaturization of bulk silicon CMOS transistors is being limited by degrading short channel effects.However, these techniques are rapidly approaching material and process limits. Alternate transistor architectures such as the planar ultra-thin body (UTB) FET and double-gate MOSFET may be necessary to continue gate length scaling down to the sub-10nm regime but these structures incorporate with complex quantum physical effects. In this work the optimization and design of advanced FD SOI MOSFET structure has been done. For the optimization, concept of strained silicon, to enhance the...