This thesis is written about the results of a research project the objective of which was the development of a new packet switched Network-on-Chip IIP for Multi-Processor System-on-Chip (MPSoC) circuits. The selected network topology was the XGFT topology as was explained earlier. Due to the small amount of available human resources usable in this one-man project, it would have been impossible to implement a complete IIP block following all of the common design practices during the project. Another NOC with a 2-D mesh topology was also designed so as to compare it with the XGFT NOC as was...