In the past 20 years, programmable logic circuits have been rapidly developed. However, the intrinsic constraints such as data volatility and high leakage currents of CMOS technology cause more and more limits, such as data loss in case of power failures, the long latency to initialize the system and high standby power etc. This last point has become a major challenge for the minimization of the transistors sub 90nm. Recently, numerous emerging technologies have been proposed and explored to overcome these problems. Among them, spintronic technologies promise the most efficiency and...
In the past 20 years, programmable logic circuits have been rapidly developed. However, the intrinsic constraints such as data volatility and high lea...
