Asynchronous Quasi Delay-Insensitive (QDI) logic offers an improved fault tolerance compared to synchronous logic. Its delay-insensitive encoding makes it not only robust to varying delays but also highly insensitive to transient faults. This work introduces a new trace based transient fault model that covers both unprotected as well as hardened QDI circuits in the necessary level of detail with moderate computational efforts. Using that model, new hardening methods for QDI circuits based on the principle of "duplication and rail cross-coupling" are derived. The proposed hardening methods are...