Clock-skew errors in time-interleaved ADCs importantly degrade the linearity of such converters. These nearly constant but unknown errors lead time-interleaved ADCs into periodical non-uniform sampling. There are some techniques of facing clock-skew errors: two-ranks sample-and-hold, channel randomization, global passive sampling, clock-edge reassignment, all-digital and all-analog calibration techniques. We propose a new kind of mixed-signal clock-skew calibration technique that distinguishes itself by the simplicity of its analog components while keeping the inherent robustness of digital...