The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ- ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the...
The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ-...
