The accelerated development of faster and cheaper electronic components faces the software designer with new challenges. One of them is to predict the viability of current architecture and the performance of current operating systems on CPUs able to operate at instruction-per-second rates about one order of magnitude higher than those available today. For this task we need to understand not only the principle of such an operating system but also the detailed mechanics and the scenario of actions determined by the random occurence of asynchronous events. Also we want to understand how this...