too vast, too complex, too grand ... for description. John Wesley Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A beginner can be easily disappointed by the generality of this language. This generality is explained by the large number of domains covered - from specifications to logical simulation or synthesis. To the very beginner, VHDL appears as a "kit." He is quickly aware that his problem may be solved with VHDL, but does not know how. He does not even know how to start. In this state of mind, all the constraints that can be set to his modeling job, by using a subset of...

In system design, generation of high-level abstract models that can be closely associated with evolving lower-level models provides designers with the ability to incrementally test' an evolving design against a model of a specification. Such high-level models may deal with areas such as performance, reliability, availability, maintainability, and system safety. Abstract models also allow exploration of the hardware versus software design space in an incremental fashion as a fuller, detailed design unfolds, leaving behind the old practice of hardware-software binding too early in the design...

Object-oriented techniques and languages have been proven to significantly increase engineering efficiency in software development. Many benefits are expected from their introduction into electronic modeling. Among them are better support for model reusability and flexibility, more efficient system modeling, and more possibilities in design space exploration and prototyping. Object-Oriented Modeling explores the latest techniques in object-oriented methods, formalisms and hardware description language extensions.
The seven chapters comprising this book provide an overview of...

Co-Design is the set of emerging techniques which allows for the simultaneous design of Hardware and Software. In many cases where the application is very demanding in terms of various performances (time, surface, power consumption), trade-offs between dedicated hardware and dedicated software are becoming increasingly difficult to decide upon in the early stages of a design. Verification techniques - such as simulation or proof techniques - that have proven necessary in the hardware design must be dramatically adapted to the simultaneous verification of Software and Hardware.
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Model Generation in Electronic Design covers a wide range of model applications and research. The book begins by describing a model generator to create component models. It goes on to discuss ASIC design and ASIC library generation. This section includes chapters on the requirements for developing and ASIC library, a case study in which VITAL is used to create such a library, and the analysis and description of the accuracy required in modeling interconnections in ASIC design.
Other chapters describe the development of thermal models for electronic devices, the development of a...

One of the main applications of VHDL is the synthesis of electronic circuits. Circuit Synthesis with VHDL is an introduction to the use of VHDL logic (RTL) synthesis tools in circuit design. The modeling styles proposed are independent of specific market tools and focus on constructs widely recognized as synthesizable by synthesis tools.
A statement of the prerequisites for synthesis is followed by a short introduction to the VHDL concepts used in synthesis. Circuit Synthesis with VHDL presents two possible approaches to synthesis: the first starts with VHDL...

Models in System Design tracks the general trend in electronics in terms of size, complexity and difficulty of maintenance. System design is by nature combined with prototyping, mixed domain design, and verification, and it is no surprise that today's modeling and models are used in various levels of system design and verification. In order to deal with constraints induced by volume and complexity, new methods and techniques have been defined. Models in System Design provides an overview of the latest modeling techniques for use by system designers.
The first part of...

Modeling in Analog Design highlights some of the most pressing issues in the use of modeling techniques for design of analogue circuits. Using models for circuit design gives designers the power to express directly the behaviour of parts of a circuit in addition to using other pre-defined components. There are numerous advantages to this new category of analog behavioral language. In the short term, by favouring the top-down design and raising the level of description abstraction, this approach provides greater freedom of implementation and a higher degree of technology independence....

The VITAL specification addresses the issues of interoperability, backannotation and high performance simulation for sign-off quality ASIC libraries in VHDL. VITAL provides modeling guidelines and a set of pre-defined packages (containing pre-defined routines for modeling functionality and timing) to facilitate the acceleration of designs which use cells from a VITAL library. The VITAL Level-I guidelines constrain the modeling capabilities provided by VHDL in order to facilitate higher performance (Figure I). Accumulating "gains" Constrained "flexibility" Higher performance & Increased...

An open process of restandardization, conducted by the IEEE, has led to the definitions of the new VHDL standard. The changes make VHDL safer, more portable, and more powerful. VHDL also becomes bigger and more complete. The canonical simulator of VHDL is enriched by new mechanisms, the predefined environment is more complete, and the syntax is more regular and flexible. Discrepancies and known bugs of VHDL'87 have been fixed. However, the new VHDL'92 is compatible with VHDL'87, with some minor exceptions.