Low Power CMOS Approximate Voting Architecture for Reliable Computing

ISBN-13: 9786139845651 / Angielski / Miękka / 2018 / 56 str.

Kalaiselvi Sundaram; Vijeyakumar Krishnasamy Natarajan; Saravanakumar Natarajan

Opis

Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design.

O autorze

Sundaram, Kalaiselvi
Ms.S.Kalaiselvi completed her Under graduation in ECE in the year 2011 and Masters in Engineering in Applied Electronics under Anna University, Chennai. She has published 5 journals and presented papers in more than 10 conferences. Her research interests are IC design, approximate computing architecture design for image and signal processing.