Design and Analysis of Agile Frequency Synthesizer

ISBN-13: 9783659149429 / Angielski / Miękka / 2012 / 164 str.

Sabbir Ahmed Osmany

Opis

Modern cellular phones and base stations have to serve a multitude of wireless communication standards with each standard using different frequency bands. For such applications, a universal programmable hardware is desirable which is often referred to as software-defined radio (SDR). This book describes agile frequency synthesizers representing key building blocks for an SDR transceiver. In this work, an innovative frequency generation scheme is derived to provide a multi-octave tuning range with very low phase noise and low spurs. A PLL phase noise model including a nonlinear phase detector is thoroughly discussed. Design techniques for low phase noise VCOs with mixed analog/digital tuning are presented. Further, the book investigates both single-loop and dual-loop PLL architectures in fractional-N synthesizers. An unconventional two-transistor based charge pump in a dual-loop PLL improves phase detector linearity and reduces charge pump noise. This results in a low in-band phase noise similar to an integer-N synthesizer. Finally, the book presents the design of fully integrated integer-N and fractional-N frequency synthesizers with detailed measurement results.

O autorze

received the M.S. degree in 2004 and the Ph.D. degree in 2012, both from University of Ulm, Germany. Since 2005, he has been with IHP Microelectronics, Germany, working on the design of analog/RF and mixed-signal ICs. His research interests include frequency synthesizers, high speed data converters, and design with CMOS and BiCMOS technologies.