Guide to FPGA Implementation of Arithmetic Functions

ISBN-13: 9789400729865 / Angielski / Twarda / 2012 / 472 str.

Jean-Pierre DesChamps; Gustavo Sutter; Enrique Cantó

Opis

Field Programmable Gate Arrays constitute one of the technologies at hand for developing electronic systems. They form an attractive option for small production quantities as their non-recurrent engineering costs are much lower than those corresponding to ASIC's. They also offer flexibility and fast time-to-market. Furthermore, in order to reduce their size, and so the unit cost, an interesting possibility is to reconfigure them at run time so that the same programmable device can execute different predefined functions. §Complex systems generally are made up of processors executing programs, memories, buses, input-output interfaces, and other peripherals of different types. Those components are available under the form of Intellectual Property (IP) cores (synthesizable Hardware Description Language descriptions or even physical descriptions). Some systems also include specific components implementing algorithms whose execution on an instruction-set processor is too slow. Typical examples of such complex algorithms are: long-operand arithmetic operations, floating-point operations, encoding and processing of different types of signals, data ciphering, and many others. The way those specific components, implementing complex algorithms, can be developed is the central topic of this book. So, it addresses to both FPGA users interested in developing new specific components - generally for reducing execution times - and IP core vendors interested in extending their catalog of specific components.

Recenzje

From the reviews:

"This is a comprehensive, almost 500 pages handbook devoted mainly to the design of a variety of hardware arithmetic units in modern processors and embedded systems. ... this comprehensive handbook may be strongly recommended for advanced academic courses on design of embedded systems. It may also be used by practising designers as an explanation of contemporary design methodologies and tools. ... The exercises at the end of each chapter enhance the didactic value of the book." (Antoni Michalski, zbMATH, Vol. 1278, 2014)

Spis treści

Basic Building Blocks.- Architecture of Digital Circuits.- Special Topics of Data Path Synthesis.- Control Unit Synthesis.- Electronic Aspects of Digital Design.- Electronic Aspects of Digital Design.- EDA Tools.- Adders.- Multipliers.- Dividers.- Other Operations.- Floating Point Arithmetic.- Finite-field Arithmetic.- Systems on Chip.- Embedded Systems Development: Case Studies.- Partial Reconfiguration on Xilinx FPGAs.

O autorze

Jean-Pierre Deschamps received an MS degree in electrical engineering from the University of Louvain, Belgium, in 1967, the PhD in computer science from the Autonomous University of Barcelona, Spain, in 1983, and a PhD degree in electrical engineering from the Polytechnic School of Lausanne, Switzerland, in 1984. He worked in several companies and universities. He is currently a professor at the University Rovira i Virgili, Tarragona, Spain. His research interests include ASIC and FPGA design, digital arithmetic and cryptography. He is the author of eight books (see the last section) and more than a hundred international papers. Gustavo Sutter received an MS degree in Computer Science from State University UNCPBA of Tandil (Buenos Aires) Argentina, and a PhD degree from the Autonomous University of Madrid, Spain. He has been a professor at the UNCPBA Argentina and is currently a professor at the Autonomous University of Madrid Spain. His research interests include ASIC and FPGA design, digital arithmetic, and development of embedded systems. He is the author of two books and about fifty international papers and communications. Enrique Cantó received an MS degree in electronic engineering (1995) and a PhD in electronic engineering (2001), both from the Polytechnic University of Barcelona, Spain. He has been a professor at the Polytechnic University of Barcelona, Spain, and is currently a professor at the University Rovira i Virgili, Tarragona, Spain. His research interests include ASIC and FPGA design, development of embedded systems, and dynamic reconfiguration of programmable devices. He is the author of about fifty international papers and communications.

Blurb

This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times –and IP core designers interested in extending their catalog of specific components.  The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption.  This is not a book on algorithms.  It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others.  Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.