Design and Implementation of JPEG Encoder

ISBN-13: 9783845430720 / Angielski / Miękka / 80 str.

Waseem Hussain Sandhu; Ahmed Meesum Awais

Opis

This book is about designing and implementing a hardware JPEG (Image) Encoder using Field Programmable Gate Array (FPGA). For simplicity of operation, the design and working of this system is further subdivided into four major blocks. These major blocks are Color space conversion (RGB to YCbCr),Discrete Cosine Transform, Quantization and Entropy Encoding. The book is divided into 8 Chapters. Chapter 1 is about introduction of JPEG and its standards. Chapter 2 is about the basic algorithm and overview of JPEG Encoding Process. Chapter 3 is about Color Space Transform and different architectures associated with it. Chapter 4 is about algorithm and different architectures associated with Discrete Cosine Transform (DCT). Chapter 5 is about Quantization and its functionality and architecture. Chapter 6 is about Entropy Coding, its architectural design and other algorithms and coding and assembling architectures associated with it. Chapter 7 is about its simulation and synthesis using Xilinx Virtex-4 FPGA. Chapter 8 is about conclusions and results. VHDL is the language used for simulation. Chip diagram and synthesis report is also included in this book in appendix section.

O autorze

Waseem Hussain Sandhu was born in Gujrat, Pakistan in 1984. He received his degree in B.S Computer Engineering from CIIT Lahore, Pakistan in 2007. In 2010,he received his M.Sc Degree in Electrical Engineering (specialized in Telecommunication) from Blekinge Institute of Technology, Sweden. His area of interest include Telecommunication Systems.