designing with fpgas and cplds

ISBN-13: 9781578201129 / Angielski / Miękka / 2002 / 240 str.

Bob Zeidman; Robert Zeidman

Opis

In this work the proprietary architectures and processes of the assortment of CPLDs and FPGAs on the market are detailed in order to provide the insight necessary for selecting the appropriate device. It describes the design flow for a CPLD-based or FPGA-based project so the reader can properly plan the necessary development tools, schedule, and resources. A detailed description of the design, simulation, and testing issues that arise when designing a CPLD or FPGA follows.

Spis treści

Foreword, Preface, Book Organization, Intended Audience, Content, Support and Feedback, Acknowledgments, Chapter 1 Prehistory: Programmable Logic to ASICs, Chapter 2: Complex Programmable Logic Devices (CPLDs}, Chapter 3: Field Programmable Gate Arrays (FPGAs}, Chapter 4: Universal Design Methodology for Programmable Devices, Chapter 5: Design Techniques, Rules, and Guidelines, Chapter 6: Verification, Chapter 7: Electronic Design Automation Tools, Chapter 8: Today and the Future, Appendix A: Answer Key, Appendix B: Verilog Code for Schematics in Chapter 5, Glossary, References, About the Author, Index

O autorze

Bob Zeidman is the president of The Chalkboard Network, an e-learning company for high-tech professionals. He is also president of Zeidman Consulting, a hardware and software contract development firm. Since 1983, he has designed CPLDs, FPGAs, ASI