McFarland, Grant

Grant McFarland holds a PhD in electrical engineering from Stanford University. His doctoral dissertation, "CMOS Technology Scaling and Its Impact on Cache Delay, " predicted the impact of fabrication technology scaling on the design of processor cache memories. Dr. McFarland is currently senior design engineer for Intel(R) Corporation where he created a corporate training course and teaches the fundamentals of microprocessor design. He participated in the design of the 180nm, 90nm, and 65nm generations of the Pentium(R) 4 microprocessor.

Readers with comments or questions about this book