VLSI Architectures For Soft-Decision Decoding Of Reed-Solomon Codes

ISBN-13: 9783659239427 / Angielski / Miękka / 2012 / 184 str.

Zhu Jiangli

Opis

Error-correcting coding has become one integral part in nearly all the modern data transmission and storage systems. Due to the powerful error-correcting capability, Reed-Solomon (RS) codes are among the most extensively used error-correcting codes with applications in wireless communications, deep-space probing, magnetic and optical recording, and digital television. Traditional hard-decision decoding (HDD) algorithms of RS codes can correct as many symbol errors as half the minimum distance of the code. Recently, much attention has been paid to algebraic soft-decision decoding (ASD) algorithms of RS codes. These algorithms incorporate channel probabilities into an algebraic interpolation process. As a result, significant coding gain can be achieved with a complexity that is polynomial in codeword length. Practical ASD algorithms include the Koetter-Vardy, low-complexity Chase (LCC) and bit-level generalized minimum distance (BGMD) decodings. This book focuses on the design of efficient VLSI architectures for ASD decoders.

O autorze

Jiangli Zhu received the B.S. and M.S. degrees in electrical engineering from Zhejiang University, China, and the Ph.D. degree in computer engineering from Case Western Reserve University, Cleveland, OH.His research interests include the design of very large-scale integration (VLSI) architectures for communications and digital signal processing.