The FPGA Implementation of Pulse Width Modulation

ISBN-13: 9786206141891 / Angielski / Miękka / 52 str.

V Nandagopal; R Kavin; D Haripriya

Opis

The objective of this research work is the generation and implementation of Pulse width modulation (PWM) and Sinusoidal Pulse width Modulation (SPWM). At first, the analysis of PWM generation for low-frequency applications is presented. PWM can be generated using FPGA, Microcontroller, Microprocessors and DSP Processors. Higher-density programmable logic devices such as FPGAs can be used to integrate large amounts of logic into a single IC. Pulse width modulation (PWM) is widely used in power converter control. The PWM is generated by using Comparator, Counter and Delay unit. Comparator PWM consumes more area and power than the Counter and delays PWM. Counter PWM is used for high-frequency applications. Both methods consume more area and power consumption. So, Delay PWM is introduced to reduce the area and power of the existing methods.

O autorze

Dr.V. Nandagopal: is currently working as a Professor and Head, the Department of Electrical and Electronics Engineering, Jaya Engineering College, Chennai, Tamil Nadu, India, Affiliated with Anna University. He has got 16 years of experience in both teaching and research.