Test Techniques for System-on-Chip : Problems and solutions

ISBN-13: 9783639207484 / Angielski / Miękka / 2009 / 148 str.

Paolo Bernardi

Opis

Fast innovation in VLSI technologies makes possible the integration of a complete system into a single chip (System-on-Chip, or SoC). In order to handle the resulting design complexity, reusable modules (called cores) are being used in many SoC applications. System designers can purchase cores from core vendors and integrate them with their own User-Defined Logic (UDL) to implement SoCs. Core-based SoCs show important advantages: design re- use guarantees lower end-product cost and reduced time-to-market, but introduces new constructive criticalities whose impact on production yield is not negligible and that make test procedures more complex. This raises the need for new suitable manufacturing test strategies. This work addresses System-on-Chip test cost reduction and provides the description and evaluation of a set of hardware structures, software tools and, in general, test techniques oriented to SoCs needs. Solutions for accurate SoC diagnosis are also part of the work.

O autorze

Paolo Bernardi was born in Torino, Italy, on November 30, 1977. He has an MS ('02) and a PhD ('06), both in computer engineering, from Politecnico di Torino. Paolo Bernardi s doctoral thesis has been awarded by the European Design and Automation Association - EDAA, with the Outstanding Dissertation Award in 2006.