Smart Multicore Embedded Systems

ISBN-13: 9781493948024 / Angielski / Miękka / 2016 / 175 str.

Massimo Torquati; Koen Bertels; Sven Karlsson

Opis

This book presents state-of-the-art high-level programming models and compilation tool-chains for embedded system platforms, taking into account both the application requirements and the platform specificities of embedded systems from different industries.

Spis treści

Introduction.- Part I Parallel Programming Models and Methodologies.- Parallel Programming Models.- Compilation Tool Chains and Intermediate Representations.- Part II HW/SW Architectures Concepts.- The STHORM Platform.- The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Co-Processor (ASVP).- Part III Run-time and Faults Management.- Fault Tolerance.- Introduction to Dynamic Code Generation -- an Experiment with Matrix Multiplication for STHORM Platform.- Part IV Case Studies.- Signal Processing: Radar.- Image Processing: Object Recognition.- Video Processing: Foreground Recognition in the ASVP platform.

O autorze

This book provides a single-source reference to the state-of-the-art of high-level programming models and compilation tool-chains for embedded system platforms.  The authors address challenges faced by programmers developing software to implement parallel applications in embedded systems, where very often they are forced to rewrite sequential programs into parallel software, taking into account all the low level features and peculiarities of the underlying platforms.  Readers will benefit from these authors’ approach, which takes into account both the application requirements and the platform specificities of various embedded systems from different industries.  Parallel programming tool-chains are described that take as input parameters both the application and the platform model, then determine relevant transformations and mapping decisions on the concrete platform, minimizing user intervention and hiding the difficulties related to the correct and efficient use of memory hierarchy and low level code generation.

This book discusses both basic concepts on parallel programming as well as advanced topics and issues related to the use of real embedded applications. The book derives from the experience and results obtained in the 3-year European ARTEMIS project SMECY (Smart Multi-core Embedded Systems, project number 100230)involving 27 partners in 9 European countries. This represents a concrete experience of work in the embedded system area, where applications, tools and platforms providers worked together in a coordinated way with the goal to obtain new, high level programming tool-chains for current and forthcoming embedded many-core platforms.                        

·         Describes tools and programming models for multicore embedded systems;

·         Emphasizes throughout performance per watt scalability;

·         Discusses realistic limits of software parallelization;

·         Enables software migration from single to multi-core;

·         Includes coverage of fault-tolerance and dynamic reconfiguration;

·         Uses case studies to demonstrate techniques presented.

Blurb

This book provides a single-source reference to the state-of-the-art of high-level programming models and compilation tool-chains for embedded system platforms. The authors address challenges faced by programmers developing software to implement parallel applications in embedded systems, where very often they are forced to rewrite sequential programs into parallel software, taking into account all the low level features and peculiarities of the underlying platforms. Readers will benefit from these authors’ approach, which takes into account both the application requirements and the platform specificities of various embedded systems from different industries. Parallel programming tool-chains are described that take as input parameters both the application and the platform model, then determine relevant transformations and mapping decisions on the concrete platform, minimizing user intervention and hiding the difficulties related to the correct and efficient use of memory hierarchy and low level code generation.