Real-Time Electromagnetic Transient Simulation of Ac-DC Networks

ISBN-13: 9781119695448 / Angielski / Twarda / 2021 / 608 str.

Venkata Dinavahi; Ning Lin

Spis treści

About the Authors xixPreface xxiAcknowledgments xxvList of Acronyms xxvii1 Field Programmable Gate Arrays 11.1 Overview 11.1.1 FPGA Hardware Architecture 21.1.2 Configurable Logic Block 31.1.3 Block RAM 41.1.4 Digital Signal Processing Slice 41.2 Multiprocessing System-on-Chip Architecture 61.3 Communication 71.4 HIL Emulation 91.4.1 Vivado(r) High-Level Synthesis Tool 91.4.2 Vivado(r) Top-Level Design 111.4.3 Number Representation and Operations 131.4.4 FPGA Design Schemes 141.4.4.1 Pipeline Design Architecture 141.4.4.2 Parallel Design Architecture 141.4.5 FPGA Experiment 151.5 Summary 162 Hardware Emulation Building Blocks for Power System Components 172.1 Overview 172.2 Concept of HEBB 182.3 Numerical Integration 182.4 Linear Lumped Passive Elements 202.4.1 Model Formulation 202.4.1.1 Resistance R 202.4.1.2 Inductance L 202.4.1.3 Capacitance C 222.4.1.4 RL Branch 232.4.1.5 LC Branch 232.4.1.6 RLCG Branch 242.4.2 Hardware Emulation of Linear Lumped Passive Elements 262.5 Sources 272.5.1 Hardware Emulation of Sources 282.6 Switches 302.6.1 Hardware Emulation of Switches 302.7 Transmission Lines 322.7.1 Traveling Waves 322.7.2 Traveling Wave Model 352.7.2.1 Modal Transformation 362.7.3 Hardware Emulation of the TWM 392.7.3.1 Transformation Unit 392.7.3.2 Update Unit 392.7.4 Frequency Dependent Line Model 412.7.5 Hardware Emulation of FDLM 462.7.5.1 Convolution Unit 462.7.5.2 Update Unit 472.7.6 Universal Line Model 482.7.6.1 Frequency-Domain Formulation 482.7.6.2 Time-Domain Formulation 492.7.7 Hardware Emulation of the ULM 512.7.7.1 Update x Unit 522.7.7.2 Convolution Unit 522.7.7.3 Interpolation Unit 542.8 Network Solver 542.8.1 Hardware Emulation of Network Solver 552.8.2 Paralleled EMT Solution Algorithm 552.8.3 Main Control Module 582.8.4 Real-Time Emulation Case Study 592.9 Nonlinear Elements: Iterative Real-Time EMT Solver 632.9.1 Compensation Method 642.9.2 Newton-Raphson Method 652.9.3 Hardware Emulation of Nonlinear Solver 672.9.3.1 Nonlinear Function Evaluation 682.9.3.2 Parallel Calculation of J and F(ikm) 682.9.3.3 Parallel Gauss-Jordan Elimination 712.9.3.4 Computing vc 712.9.4 Case Studies 712.10 Summary 773 Power Transformers 793.1 Overview 793.2 Nonlinear Admittance-Based Real-Time Transformer Model 803.2.1 Linear Model Formulation 803.2.2 Linear Module Hardware Design 823.2.3 Inode Unit Module 843.2.4 Nonlinear Model Solution 853.2.4.1 Preisach Hysteresis Model 883.2.4.2 Nonlinear Module Hardware Design 893.2.5 Frequency-Dependent Eddy Current Model 903.2.6 Hardware Emulation of Power Transformer 913.2.7 Real-Time Emulation Case Studies 943.2.7.1 Case I 943.2.7.2 Case II 993.3 Nonlinear Magnetic Equivalent Circuit Based Real-time Multi-Winding Transformer Model 1003.3.1 Topological ST EMT Model 1023.3.1.1 ST Operating Principle 1023.3.1.2 Tap-selection Algorithm 1023.3.1.3 High-Fidelity Nonlinear MEC-Based ST Model 1023.3.1.4 Iron Core Hysteresis and Eddy Currents 1073.3.2 High-Fidelity Nonlinear MEC-Based ST Hardware Emulation 1093.3.2.1 Network Transient Emulation with Embedded ST 1093.3.3 Real-Time Emulation Case Studies 1123.3.3.1 Finite Element Modeling and Validation 1123.3.3.2 Case Studies 1123.4 Real-Time Finite-Element Model of Power Transformer 1233.4.1 Magnetodynamic Problem Formulation 1233.4.1.1 Refined TLM Solution 1263.4.1.2 Field-Circuit Coupling 1303.4.2 Hardware Emulation of Finite Element Model 1323.4.3 Case Studies 1363.4.3.1 Results and Validation 1373.4.3.2 Speed-up and Scalability 1403.5 Summary 1414 Rotating Machines 1434.1 Overview 1434.2 Lumped Universal Machine (UM) Model 1444.2.1 UM Model Formulation 1444.2.2 Interfacing UM Model with Network 1464.2.3 UM HEBB 1484.2.3.1 Speed & Angle Unit 1494.2.3.2 FrmTran Unit 1504.2.3.3 Compidq0 Unit 1514.2.3.4 Flux & Torque Unit 1514.2.3.5 Update & CompVc Unit 1514.2.4 Real-Time Emulation Case Study 1524.2.5 Overall Power System HEBB for Real-Time EMT Emulation 1544.3 General Framework for State-Space Electrical Machine Emulation 1584.3.1 FPGA Design Approaches for Electrical Machine Emulation 1594.3.2 State-Space Representation of Machine Models 1604.3.3 System Configuration on FPGA 1614.3.3.1 Number Representation 1614.3.3.2 Floating-Point Implementation by VHDL 1624.3.3.3 Fixed-Point Implementation by Schematic 1674.3.4 Evaluation of Designed Architectures 1704.3.4.1 Real-Time Emulation Accuracy Assessment 1704.3.4.2 Off-line Validation 1714.3.4.3 Hardware Resource Utilization 1724.3.5 Real-Time Emulation Case Studies 1744.3.5.1 Case I: Induction Motor Transients 1744.3.5.2 Case II: Synchronous Generator Transients 1744.3.5.3 Case III: Line Start-Permanent Magnet Synchronous Motor Transients 1764.3.5.4 Case IV: DC Motor Transients 1774.4 Nonlinear Magnetic Equivalent Circuit Based Induction Machine Model 1784.4.1 Magnetic Circuit 1794.4.2 Interfacing of Magnetic and Electric Circuits 1814.4.3 Electric Circuit 1824.4.4 Nonlinear Solution of Detailed MEC 1824.4.5 Hardware Emulation of Nonlinear MEC 1834.4.5.1 Parallel Gauss-Jordan Elimination Unit 1854.4.5.2 Parallel Computational Unit for Residual Vector 1874.4.5.3 Nonlinear Evaluation Unit 1874.4.6 Evaluation of Real-Time Emulation of Induction Machine 1874.5 Summary 1905 Protective Relays 1935.1 Overview 1935.2 Hardware Emulation of Multifunction Protection System 1955.2.1 Signal Processing HEBB 1965.2.1.1 CORDIC HEBB 1965.2.1.2 Symmetrical Components HEBB 1985.2.1.3 DFT HEBB 1985.2.1.4 Zero-Crossing Detection HEBB 1995.2.2 Multifunction Protective System HEBB 2035.2.2.1 Fault Detection HEBB 2035.2.2.2 Directional Overcurrent Protection HEBB 2055.2.2.3 Over/Under Voltage Protection HEBB 2055.2.2.4 Distance Protection HEBB 2055.2.2.5 Under/Over Frequency Protection HEBB 2095.3 Test Setup and Real-Time Results 2095.3.1 Case I 2105.3.2 Case II 2135.4 Summary 2146 Adaptive Time-Stepping Based Real-Time EMT Emulation 2176.1 Overview 2176.2 Nonlinear Solution and Adaptive Time-Stepping Schemes 2196.2.1 Nonlinear Element Solution Methods 2196.2.1.1 Newton-Raphson Method 2196.2.1.2 Piecewise Linearization (PWL) Method 2196.2.1.3 Piecewise N-R Method 2206.2.2 Adaptive Time-Stepping Schemes 2206.2.2.1 Local Truncation Error Method 2206.2.2.2 Iteration Count Method 2216.2.2.3 DVDT or DIDT Method 2216.2.3 Combinations of Adaptive Time-Stepping Schemes 2226.2.3.1 Measurements and Restrictions for Real-Time Emulation 2226.2.4 Case Studies 2236.2.4.1 Diode Full-Bridge Circuit 2246.2.4.2 Power Transmission System 2256.2.4.3 FPGA Implementation 2296.2.4.4 Real-Time Emulation Results 2346.3 Adaptive Time-Stepping Universal Line Model and Universal Machine Model for Real-Time Hardware Emulation 2366.3.1 Subsystem-Based Adaptive Time-Stepping Scheme 2376.3.2 Adaptive Time-Stepping ULM and UM Models 2386.3.2.1 ULM Computation 2386.3.2.2 Universal Machine Model Computation 2426.3.3 Real-Time Emulation Case Study 2436.3.3.1 Hardware Implementation 2436.3.3.2 Latency and Hardware Resource Utilization 2466.3.4 Results and Validation 2476.3.4.1 Validation of the ULM Model 2476.3.4.2 Real-Time Emulation Results 2486.4 Summary 2527 Power Electronic Switches 2537.1 Overview 2537.2 IGBT/Diode Nonlinear Behavioral Model 2557.2.1 Power Diode 2567.2.1.1 Mathematical Model 2567.2.1.2 Hardware Module Architecture 2577.2.2 IGBT 2597.2.2.1 Model Formulation 2597.2.2.2 Hardware Module Architecture 2637.2.2.3 Multiple Parallel Devices 2657.2.3 Electro-Thermal Network 2677.2.4 Hardware Emulation Results 2687.3 Physics-Based Nonlinear IGBT/Diode Model 2707.3.1 Physics-Based Nonlinear p-i-n Diode Model 2717.3.1.1 Model Formulation 2717.3.1.2 Model Discretization and Linearization 2727.3.1.3 Hardware Emulation on FPGA 2747.3.2 Physics-Based Nonlinear IGBT Model 2767.3.2.1 Model Formulation 2767.3.2.2 Model Discretization and Linearization 2797.3.2.3 Hardware Emulation on FPGA 2817.3.3 Hardware Emulation Results 2857.3.3.1 Test circuit 2857.3.3.2 Results and comparison 2867.4 IGBT/Diode Curve-Fitting Model 2927.4.1 Linear Static Curve-fitting Model 2937.4.1.1 Static Characteristics 2937.4.1.2 Switching Transients 2937.4.2 Nonlinear Dynamic Curve-fitting Model 2967.4.3 Hardware Emulation Results 2987.5 Summary 3008 AC-DC Converters 3018.1 Overview 3018.2 Detailed Model 3038.2.1 Detailed Equivalent Circuit Model 3048.3 Equivalenced Device-Level Model 3058.3.1 Power Loss Calculation 3078.3.2 Thermal Network Calculation 3098.3.3 Hardware Emulation of SM Model on FPGA 3118.3.4 MMC System Hardware Emulation 3148.3.5 Real-Time Emulation Results 3168.3.5.1 Test Circuit and Hardware Resource Utilization 3168.3.5.2 Results and Comparison for Single-Phase Five-Level MMC 3188.3.5.3 Results for Three-Phase Nine-Level MMC 3248.4 Virtual-Line-Partitioned Device-Level Models 3248.4.1 TLM-Link Partitioning 3268.4.2 Hardware Design on FPGA 3288.4.2.1 Hardware Platform 3298.4.2.2 Controller Emulation 3298.4.2.3 MMC Emulation on FPGA 3308.4.3 Real-Time Emulation Results 3358.4.3.1 MMC 3358.4.3.2 Induction Machine Driven by Five-Level MMC 3428.5 MMC Partitioned by Coupled Voltage-Current Sources 3448.5.1 V-I Coupling 3448.5.2 Hardware Emulation Case of NBM-Based MMC 3468.5.2.1 Power Converter HIL Emulation 3468.5.2.2 HIL Emulation Results and Validation 3478.5.2.3 Islanded MMC Performance 3488.5.2.4 MMC-MVDC Performance 3558.6 Clamped Double Submodule MMC 3558.6.1 Operation Principles of CDSM 3578.6.2 Device-Level Modeling Scheme 3598.6.2.1 Temperature-Dependent Electrical Interface Parameter Calculation 3598.6.2.2 Device-Level Linearized Transient Waveform Calculation 3618.6.3 SM-Level Modeling Scheme 3628.6.4 Converter-Level Modeling Scheme 3628.6.5 Case Study and Hardware Implementation 3638.6.5.1 Design Partition 3658.6.5.2 Latency and Resource Consumption 3678.6.6 Real-Time Emulation Results and Analysis 3688.6.6.1 Steady-State Results 3688.6.6.2 DC Power Flow Control 3688.6.6.3 DC Fault Transient Results 3718.7 Summary 3749 DC-DC Converters 3779.1 Overview 3779.2 Buck-Boost Converter 3799.2.1 System-Level Modeling 3799.2.2 Hardware Implementation 3809.3 Solid-State Transformer Modeling 3819.3.1 MMC Arm Models 3829.3.1.1 TLM-Stub Model (TLM-S) 3829.3.1.2 Nonlinear Switch-Based Model (NSM) 3839.3.1.3 Hybrid Arm Model 3849.3.2 Three-Phase Saturable Transformer Model 3859.3.3 SST EMT Model 3859.3.4 SST HIL Emulation 3869.3.5 SST Real-Time HIL Emulation Results 3909.3.5.1 Device-Level Behavior 3909.3.5.2 Converter Performance 3919.3.5.3 System Tests 3929.4 Summary 39410 DC Circuit Breakers 39710.1 Overview 39710.2 HHB in MTDC System 39910.2.1 MTDC Test System Schematic 39910.2.2 DC Line Protection 40110.2.2.1 Voltage Derivative Protection 40110.2.2.2 Over Current Protection 40110.3 Proactive Hybrid HVDC Breaker 40210.3.1 HHB EMT Model 40310.3.2 Varistor Model 40410.3.3 General HHB Unit Model 40610.3.4 Two-Node IGBT Models 40710.3.5 IGBT Low-Order Nonlinear Behavioral Model 40910.3.5.1 IGBT Fourth-Order Behavioral Model 40910.3.5.2 Parameters Extraction 40910.3.5.3 Sensitivity Analysis 41010.3.5.4 Model Parallelization 41110.3.6 Electro-Thermal Network 41210.3.7 HHB Hardware Implementation on FPGA 41210.3.8 HHB HIL Emulation Results 41610.3.8.1 Device-Level Performance 41610.3.8.2 System-Level Performance 42410.4 Ultrafast Mechatronic Circuit Breaker 42610.4.1 Nonlinear Device-Level Thyristor Model 42610.4.1.1 Basic Device Characteristics 42610.4.1.2 Scalable Cascaded Thyristor Model 42810.4.2 UFMCB Modeling 43110.4.3 Relaxed Scalar Newton-Raphson (RSNR) 43310.4.4 UFMCB Hardware Design 43510.4.5 UFMCB Real-Time Tests and Validation 43810.4.5.1 Four-Terminal DC Grid Test Case 43810.4.5.2 UFMCB Design Evaluation by HIL System 43810.4.5.3 UFMCB in HVDC Grid 44210.5 Summary 44411 Large-Scale AC and DC Networks 44711.1 Overview 44711.2 Spatial Decomposition and Parallelism 44911.2.1 Functional Decomposition for Large-Scale Real-Time Emulation 44911.2.2 Hardware Module Parallelism 45111.3 Multi-FPGA Hardware Design for Real-Time EMT Emulation 45311.3.1 Case I: 3-FPGA Hardware Design 45411.3.2 Case II: 10-FPGA Hardware Design 45711.3.3 Performance and Scalability of the Real-Time EMT Emulator 46011.4 CIGRÉ DC Grid Hybrid Modeling Methodology 46511.4.1 Network Topology 46711.4.2 Control Scheme 46711.4.3 Hybrid Modeling Methodology 46811.4.3.1 Device-Level Electrothermal Model 46911.4.3.2 Equivalent Circuit Model 46911.4.3.3 Average Value Model 47111.4.3.4 Transmission Line Model 47111.4.4 Real-Time MPSoC-FPGA Based DC Grid Emulator 47111.4.4.1 System Decomposition 47111.4.4.2 Hardware Resource Allocation and Task Partitioning 47211.4.4.3 Design and Implementation 47411.4.5 Real-Time Emulation Results and Validation 47511.4.5.1 Steady-State Operation 47511.4.5.2 Power Flow Command Change 47711.4.5.3 DC Fault 47711.5 Real-Time Co-Emulation Framework for Cyber-Physical Systems 47911.5.1 Communication Network Simulation and Co-Simulation 48111.5.2 Real-Time Co-Emulation Framework 48411.5.2.1 RTCE Hardware Architecture 48411.5.3 Hardware Implementation of RTCE 48711.5.3.1 Multi-Board EMT Emulation 48811.5.3.2 Communication Protocol and Implementation 48911.5.4 Real-Time Emulation Results and Verification 49111.5.4.1 Processing Delay and Hardware Resource Cost 49111.5.4.2 Case Study 1: Over-Current Fault 49211.5.4.3 Case Study 2: Communication Link Failure 49311.6 Faster-Than-Real-Time Hybrid Dynamic-EMT Emulation of AC-DC Grids 49511.6.1 Flexible Time-Stepping Algorithm for Dynamic Emulation 49611.6.1.1 Transient Stability Emulation Methodology 49611.6.1.2 Local Equipment Based Flexible Time-stepping 49711.6.2 AC-DC Grid Component Modeling 49811.6.2.1 AC-DC Grid Interface 49811.6.2.2 AC Grid Modeling 49911.6.2.3 DC Grid Modeling 50111.6.3 FTRT Emulation on FPGAs 50311.6.4 FTRT Emulation Results and Validation 50511.6.4.1 Three-Phase-to-Ground Fault 50611.6.4.2 Generator Outage and Sudden Load Change 50711.7 Summary 510Bibliography 513Appendix A Parameters for Case Studies 531A.1 Chapter 2 531A.1.1 Case in Section 2.7 531A.1.2 Cases in Section 2.8 531A.2 Chapter 3 531A.2.1 Cases in Section 3.2 531A.2.1.1 Cases Study I 531A.2.1.2 Cases Study II 532A.2.2 Cases in Section 3.3 532A.2.2.1 Transformer 532A.2.2.2 System 532A.2.3 Cases in Section 3.4 532A.3 Chapter 4 533A.3.1 UM Case in Section 4.2 533A.3.2 Cases in Section 4.3 534A.3.2.1 State-Space Matrices of Rotating Machines 534A.3.2.2 Parameters of Rotating Machines 538A.3.3 MEC Case in Section 4.4 538A.4 Chapter 5 538A.5 Chapter 6 539A.5.1 Cases in Section 6.2 539A.5.2 Cases in Section 6.3 540A.6 Chapter 7 540A.7 Chapter 8 541A.7.1 Equivalenced Device-Level Model in Section 8.3 541A.7.2 MMC-IM Case in Section 8.4 541A.7.3 MVDC Case in Section 8.5 541A.7.4 MTDC Case in Section 8.6 541A.8 Chapter 9 541A.9 Chapter 10 542A.9.1 HHB Case 542A.9.2 UFMCB Case 542A.10 Chapter 11 543A.10.1 CIGRÉ B4 DC Grid Test System 543Index 545

O autorze

Venkata Dinavahi, PhD, PEng, FIEEE, is a Professor in the Department of Electrical and Computer Engineering at the University of Alberta in Edmonton, Alberta, Canada. He received the BEng degree from the Visveswaraya National Institute of Technology (VNIT), Nagpur, India, in 1993, the MTech degree from the Indian Institute of Technology (IIT) Kanpur, India, in 1996, and a PhD in Electrical and Computer Engineering from the University of Toronto, Ontario, Canada, in 2000. He was the founding chair of the IEEE Power & Energy Society (PES) Task Force on Interfacing Techniques for Simulation Tools from 2006-2014. He contributed to several IEEE PES Working Groups and Task Forces notably in the Analytical Methods for Power Systems (AMPS) committee. He is a Fellow of IEEE, a member of CIGRÉ and a Professional Engineer in the Province of Alberta. He was the recipient of the 2018 Outstanding Engineer Award from the IEEE PES/IAS Northern Canada Chapter.Ning Lin, PhD, is a Postdoctoral Researcher at the University of Alberta. He received the BSc and MSc degrees in Electrical Engineering from Zhejiang University, China, in 2008 and 2011, respectively, and a PhD in Electrical and Computer Engineering from the University of Alberta, Canada, in 2018. From 2011 to 2014, he worked as an engineer on power system automation, flexible AC transmission system (FACTS), and high-voltage direct current (HVDC). His research interests include electromagnetic transient simulation, transient stability analysis, real-time simulation, AC/DC grids, parallel processing, and high-performance computing of power systems and power electronics.