Quick Start Guide to VHDL

ISBN-13: 9783031425424 / Angielski / Twarda / 2023

Brock J. LaMeres

Opis

This textbook provides a starter’s guide to VHDL. This book can be used in conjunction with a one-semester course in Digital Systems Design or on its own for designers who only need an introduction to the language. This book is designed to provide a bottoms-up approach to learning the VHDL language. This design supports a course in which foundational knowledge is covered before moving into advanced topics. However, this design also supports use as a reference manual. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

Spis treści

The Modern Digital Design Flow.- VHDL Constructs.- Modeling Concurrent Functionality in VHDL.- Structural Design & Hierarchy.- Modeling Sequential Functionality.- Packages.- Test Benches.- Modeling Sequential Storage & Registers.- Modeling Finite State Machines.- Modeling Counters.- Modeling Memory.- Computer System Design.- Appendix A: List of Worked Examples.

O autorze

Brock J. LaMeres is a Professor in the Department of Electrical & Computer Engineering at Montana State University (MSU).  He also serves as the Director of the Montana Engineering Education Research Center and holds a current appointment as his college’s Boeing Professor of Engineering Education. He received his Ph.D. in electrical engineering from the University of Colorado, Boulder in December of 2005, his MSEE from the University of Colorado, Colorado Springs in May of 2001, and his BSEE from Montana State University, Bozeman in December of 1998. LaMeres teaches and conducts research in the area of digital systems with particular emphasis on exploiting reprogrammable logic fabrics to deliver more effective computer systems. LaMeres is also studying how engineering education can be improved using innovative e-learning environments. LaMeres has published over 100 papers and 5 textbooks in the area of digital logic. LaMeres has also been granted 13 US patents in the area of digital signal propagation. LaMeres is a Senior Member of IEEE and a Registered Professional Engineer in the State of Montana. Prior to joining the MSU faculty, Dr. LaMeres worked as an R&D engineer for Hewlett-Packard in Colorado Springs, CO where he designed electronic test equipment for the computer industry.

Blurb

This textbook provides a starter’s guide to VHDL. This book can be used in conjunction with a one-semester course in Digital Systems Design or on its own for designers who only need an introduction to the language. This book is designed to provide a bottoms-up approach to learning the VHDL language. This design supports a course in which foundational knowledge is covered before moving into advanced topics. However, this design also supports use as a reference manual. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

• A comprehensive coverage of the basic capability of VHDL;
• Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book;
• Includes more than 400 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes