Power Trade-Offs and Low-Power in Analog CMOS ICS

ISBN-13: 9781441949431 / Angielski / Miękka / 2010 / 214 str.

Mihai A. T. Sanduleanu; Ed A. J. M. Van Tuijl

Opis

The enormous rise of digital applications in the last two decades arouses the suggestion that analog techniques will lose their importance. However in applications that work with digital signals analog techniques are still very important for a number of reasons. First the signal that must be processed or stored may be analog at the input and output of the system. Second when digital circuits must operate at high speed the analog behavior becomes important again. And third when only limited bandwidth and signal to noise ratio is available the theoretical maximum data rate is determined by Shannon s law. This theoretical limit can only be approximated in practice when complex modulation schemes are used, and after this modulation process the signal is analog again. Of course this does effect the tremendous advantage of digital signals compared to analog signals. Where analog signals deteriorate every time they are processed or stored, digital signals can be recovered perfectly when they are tailored to the properties of the system they are used for. The accuracy of digital signal processing is only limited by practical constraints and many digital signals can be compressed very effective so that after compression they use less bandwidth then their analog counterparts. In any aplication there will thus be analog and digital parts and often the choice has to be made if an analog or a digital solution is preferred for a certain function."

Spis treści

Selected Symbols and Abbreviations. 1: Introduction. 1.1. Motivation. 1.2. Problem definition. 1.3. Scope and outline. References. 2: Power considerations in sub-micron digital CMOS. 2.1. Introduction. 2.2. Fundamental limits. 2.3. From fundamental limits to practical limits of power. An architecture level approach. 2.4. S/N ratio and power in fixed point applications. 2.5. Adders and computational power. 2.6. Ways to low-power in digital. 2.7. Example of a digital video filter. 2.8. Conclusions. References. 3: Power considerations in sub-micron analog CMOS. 3.1. Introduction. 3.2. Process tuning towards digital needs. Consequences on analog. 3.3. Fundamental limits. 3.4. From fundamental limits to practical limits of power. Noise related power. 3.5. From fundamental limits to practical limits of power. Mismatch related power. 3.6. Power estimations in continuous time filters. 3.7. Conclusion. References. 4: Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35mum CMOS. 4.1. Introduction. 4.2. Large swing and high linearity transconductor. 4.3. Low voltage current Gm-C integrator with high power efficiency. 4.4. Low-power luminance video filter. Noise driven power. 4.5. Low-power, gaussian, polyphase filter for mobile transceivers. Matching driven power. 4.6. Conclusions.References. 5: Chopping: a technique for noise and offset reduction. 5.1. Introduction. 5.2. Ways to reduce offsetand 1/f noise. 5.3. Chopping seen as a modulation technique. 5.4. Noise modulation. 5.5. Chopped amplifiers and offset reduction. 5.6. Low-power low-voltage chopped transconductance amplifier for noise and offset reduction. Chopping at high frequency. 5.7. A low-power bandgap voltage reference. 5.8. Conclusions. References. 6: Low-noise, low residual offset, chopped amplifiers for high-end applications. 6.1. Introduction. 6.2. Low-pass filtering in a digital audio system. Application specific constraints. 6.3. The gain stage. 6.4. A low noise, low residual offset, chopped amplifier in 0.8mm CMOS. 6.5. A low noise, low residual offset, chopped amplifier in 0.5mm CMOS. 6.6. Conclusions. References. 7: A 16-bit D/A interface with Sinc approximated semidigital reconstruction filter. 7.1. Introduction. 7.2. Bitstream D/A conversion system with time-discrete filtering. 7.3. S-D modulators and noise shaping. 7.4. Semidigital FIR filter principles. 7.5. Semidigital FIR filter design. 7.6. Noise properties of the D/A interface. 7.7. Realisation. 7.8. Experimental results. 7.9. Interpolative D/A converter with Sinc approximation in the time domain. 7.10. Conclusions. References. 8: Conclusions. 8.1. Summary. 8.2. Conclusions. 8.3. Original contributions. 8.4. Recommendations for further research. Appendix 1. Appendix 2. Appendix 3. Dankwoord. Curriculum Vitae & List of Publications.