Power Distribution Networks with On-Chip Decoupling Capacitors

ISBN-13: 9781441943996 / Angielski / Miękka / 2010 / 516 str.

Mikhail Popovich; Andrey Mezhiba; Eby G. Friedman

Opis

This book provides insight into the behavior and design of power distribution systems for high speed, high complexity integrated circuits. Also presented are criteria for estimating minimum required on-chip decoupling capacitance. Techniques and algorithms for computer-aided design of on-chip power distribution networks are also described; however, the emphasis is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.

Spis treści

Inductive Properties of Electric Circuits.- Properties of On-Chip Inductive Current Loops.- Electromigration.- High Performance Power Distribution Systems.- Decoupling Capacitance.- On-Chip Power Distribution Networks.- Computer-Aided Design and Analysis.- Inductive Properties of On-Chip Power Distribution Grids.- Variation of Grid Inductance with Frequency.- Inductance/Area/Resistance Tradeoffs.- Scaling Trends of On-Chip Power Distribution Noise.- Impedance Characteristics of Multi-Layer Grids.- Multiple On-Chip Power Supply Systems.- On-Chip Power Distribution Grids with Multiple Supply Voltages.- Decoupling Capacitors for Multi-Voltage Power Distribution Systems.- On-chip Power Noise Reduction Techniques in High Performance ICs.- Effective Radii of On-Chip Decoupling Capacitors.- Efficient Placement of Distributed On-Chip Decoupling Capacitors.- Impedance/Noise Issues in On-Chip Power Distribution Networks.- Conclusions.

O autorze

Decoupling capacitors are often utilized to mitigate power distribution noise, maintaining the impedance of a power distribution system below the target specifications in the range of operating frequencies.
This book presents power distribution grids with on-chip decoupling capacitors and discusses the design of decoupling capacitors for power distribution networks with multiple supply voltages. To be effective, on-chip decoupling capacitors should be located inside the effective radius. This book develops a design methodology for placing on-chip decoupling capacitors in this manner and presents two criteria to estimate the minimum required on-chip decoupling capacitance. Techniques and algorithms for the computer-aided design and analysis of on-chip power distribution networks are also described; however, the emphasis of the book is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.

Blurb

Power Distribution Networks with On-Chip Decoupling Capacitors is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding tens of watts and the power supply below a volt. The book provides insight and intuition into the behavior and design of integrated circuit-based power distribution systems.

The book has three primary objectives. The first is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the power terminals of the on-chip circuitry. The second is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for effciently placing on-chip decoupling capacitors in nanoscale integrated circuits.

Power Distribution Networks with On-Chip Decoupling Capacitors is a reference for professional engineers in the fields of circuits and systems and computer-aided design.