Pic16f1847 Microcontroller-Based Programmable Logic Controller, Three Volume Set

ISBN-13: 9780367506537 / Angielski / Twarda / 2020 / 1224 str.

Murat Uzam

Opis

With a focus on how to design and implement a PLC, this set explains hardware and associated basic concepts, intermediary and advanced concepts of PLC (using PIC16F1847). Flowcharts are provided to help the understanding of macros including twenty application examples to show how to use the PIC16F1847-Based PLC in different control applications

Spis treści

Volume I:
Chapter 1 - Hardware of the PIC16F1847-Based PLC

Chapter 2 - Basic Software
 2.1. Definition and Allocation of Variables
 2.2. Contents of the File PICPLC_PIC16F1847_memory.inc
 2.3. Contents of the File PICPLC_PIC16F1847_main.asm
 2.4. Contents of the File PICPLC_PIC16F1847_user.inc
 2.5. Contents of the File PICPLC_PIC16F1847_subr.inc
 2.6. Contents of the File PICPLC_PIC16F1847_macros.inc
 2.7. Example Programs
 2.8. Reference
 
Chapter 3 - Contact and Relay Based Macros
 3.1. Macro “ld” (load)
 3.2. Macro “ld_not” (load_not)
 3.3. Macro “not” 
 3.4. Macro “or”
 3.5. Macro “or_not”
 3.6. Macro “nor”
 3.7. Macro “and”
 3.8. Macro “and _not”
 3.9. Macro “nand”
 3.10. Macro “xor”
 3.11. Macro “xor_not”
 3.12. Macro “xnor”
 3.13. Macro “out”
 3.14. Macro “out_not”
 3.15. Macro “mid_out” (Midline Output)
 3.16. Macro “mid_out_not” (Inverted Midline Output)
 3.17. Macro “in_out”
 3.18. Macro “inv_out”
 3.19. Macro “_set”
 3.20. Macro “_reset”
 3.21. Macro “SR” (Set-Reset)
 3.22. Macro “RS” (Reset-Set)
 3.23. Macro “r_edge” (rising edge detector)
 3.24. Macro “f_edge” (falling edge detector)
 3.25. Macro “r_toggle” (Output Toggle with Rising Edge Detector)
 3.26. Macro “f_toggle” (Output Toggle with Falling Edge Detector)
 3.27. Macro “adrs_re” (Address Rising Edge Detector)
 3.28. Macro “adrs_fe” (Address Falling Edge Detector)
 3.29. Macro “setBF” (set Bit Field)
 3.30. Macro “resetBF” (reset Bit Field)
 3.31. Examples for Contact and Relay Based Macros

Chapter 4 - Flip-Flop Macros  
 4.1. Macro latch1 (D latch with active high enable)  
 4.2. Macro latch0 (D latch with active low enable)  
 4.3. Macro “dff_r” (rising edge triggered D flip-flop)  
 4.4. Macro dff_r_SR (rising edge triggered D flip-flop with active high preset (S) and clear (R) inputs)  
 4.5. Macro “dff_f” (falling edge triggered D flip-flop)  
 4.6. Macro dff_f_SR (falling edge triggered D flip-flop with active high preset (S) and clear (R) inputs)  
 4.7. Macro “tff_r” (rising edge triggered T flip-flop)  
 4.8. Macro tff_r_SR (rising edge triggered T flip-flop with active high preset (S) and clear (R) inputs)  
 4.9. Macro “tff_f” (falling edge triggered T flip-flop)  
 4.10. Macro tff_f_SR (falling edge triggered T flip-flop with active high preset (S) and clear (R) inputs)  
 4.11. Macro “jkff_r” (rising edge triggered JK flip-flop)  
 4.12. Macro jkff_r_SR (rising edge triggered JK flip-flop with active high preset (S) and clear (R) inputs)  
 4.13. Macro “jkff_f” (falling edge triggered JK flip-flop)  
 4.14. Macro jkff_f_SR (falling edge triggered JK flip-flop with active high preset (S) and clear (R) inputs)  
 4.15. Examples for Flip-Flop Macros  

Chapter 5 - Timer Macros
 5.1. On Delay Timer (TON)
 5.2. Macro “TON_8” (8-Bit ON Delay Timer)
 5.3. Macro “TON_16” (16-Bit ON Delay Timer)
 5.4. Retentive On Delay Timer (RTO)
 5.5. Macro “RTO_8” (8-Bit Retentive ON Delay Timer)
 5.6. Macro “RTO_16” (16-Bit Retentive ON Delay Timer)
 5.7. Off Delay Timer  (TOF)
 5.8. Macro “TOF_8” (8-Bit OFF Delay Timer)
 5.9. Macro “TOF_16” (16-Bit OFF Delay Timer)
 5.10. Pulse Timer (TP)
 5.11. Macro “TP_8” (8-Bit Pulse Timer)
 5.12. Macro “TP_16” (16-Bit Pulse Timer)
 5.13. Extended Pulse Timer (TEP)
 5.14. Macro “TEP_8” (8-Bit Extended Pulse Timer)
 5.15. Macro “TEP_16” (16-Bit Extended Pulse Timer)
 5.16. Oscillator Timer (TOS) 
 5.17. Macro “TOS_8” (8-Bit Oscillator Timer)
 5.18. Macro “TOS_16” (16-Bit Oscillator Timer) 
 5.19. Examples for Timer Macros

Chapter 6 - Counter Macros
 6.1. Up Counter (CTU)
 6.2. Macro “CTU_8” (8-Bit Up Counter)
 6.3. Macro “CTU_16” (16-Bit Up Counter)
 6.4. Down Counter (CTD)
 6.5. Macro “CTD_8” (8-Bit Down Counter)
 6.6. Macro “CTD_16” (16-Bit Down Counter)
 6.7. Up/Down Counter (CTUD)
 6.8. Macro CTUD_8” (8-Bit Up/Down Counter)
 6.9. Macro CTUD_16” (16-Bit Up/Down Counter)
 6.10. Generalized Up/Down Counter (GCTUD)
 6.11. Macro GCTUD_8” (8-Bit Generalized Up/Down Counter)
 6.12. Macro GCTUD_16” (16-Bit Generalized Up/Down Counter)
 6.13. Examples for Counter Macros

Chapter 7 - Comparison Macros (Available as E-Ancillaries)
 7.1. Macro “R1_GT_R2”
 7.2. Macro “R1_GT_R2_16”
 7.3. Macro “R1_GE_R2” 
 7.4. Macro “R1_GE_R2_16” 
 7.5. Macro “R1_EQ_R2”
 7.6. Macro “R1_EQ_R2_16”
 7.7. Macro “R1_LT_R2”
 7.8. Macro “R1_LT_R2_16”
 7.9. Macro “R1_LE_R2”
 7.10. Macro “R1_LE_R2_16”
 7.11. Macro “R1_NE_R2”
 7.12. Macro “R1_NE_R2_16”
 7.13. Macro “R_GT_K”
 7.14. Macro “R_GT_K_16”
 7.15. Macro “R_GE_K”
 7.16. Macro “R_GE_K_16”
 7.17. Macro “R_EQ_K”
 7.18. Macro “R_EQ_K_16”
 7.19. Macro “R_LT_K”
 7.20. Macro “R_LT_K_16”
 7.21. Macro “R_LE_K”
 7.22. Macro “R_LE_K_16”
 7.23. Macro “R_NE_K”
 7.24. Macro “R_NE_K_16”
 7.25. Macro “in_RANGE”
 7.26. Macro “in_RANGE_16”
 7.27. Macro “out_RANGE”
 7.28. Macro “out_RANGE_16”
 7.29. Macro “Hbit_CaC” (High Bit Count and Compare)
 7.30. Macro “Lbit_CaC” (Low Bit Count and Compare)
 7.31. Examples for Comparison Macros

Appendix A - List of Components for Boards and Modules (Available as E-Ancillaries)
 Table A.1. Some example universal double sided prototyping printed circuit boards (PCBs) that can be used for the modules developed in this book
 Table A.2. List of components for the PIC16F1847-Based PLC CPU board
 Table A.3. List of components for one I/O extension board only
 Table A.4. List of components for the 5.00V voltage reference module
 Table A.5. List of components for the RC low pass filter module
 Table A.6. List of components for the voltage regulator module

Volume II:
Chapter 1 - Arithmetical Macros
 1.1 Macro “R1addR2”
 1.2 Macro “R1addR2_16”
 1.3 Macro “RaddK”
 1.4 Macro “RaddK_16”
 1.5 Macro “R1subR2”
 1.6 Macro “R1subR2_16”
 1.7 Macro “RsubK”
 1.1 Macro “RsubK_16”
 1.9 Macro “R1mulR2”
 1.10 Macro “DivU16by8”
 1.11 Macro “incR”
 1.12 Macro “incR_16”
 1.13 Macro “decR”
 1.14 Macro “decR_16”
 1.15 Macro “Hbit_CNT” (High Bit Counter)
 1.16 Macro “Lbit_CNT” (Low Bit Counter)
 1.17 Examples for Arithmetical Macros

Chapter 2 - Logical Macros
 2.1 Macro “R1andR2”
 2.2 Macro “RandK”
 2.3 Macro “R1nandR2”
 2.4 Macro “RnandK”
 2.5 Macro “R1orR2”
 2.6 Macro “RorK”
 2.7 Macro “R1norR2”
 2.8 Macro “RnorK”
 2.9 Macro “R1xorR2”
 2.10 Macro “RxorK”
 2.11 Macro “R1xnorR2”
 2.12 Macro “RxnorK” 
 2.13 Macro “invR”
 2.14 An Example for Logical Macros

Chapter 3 - Shift and Rotate Macros
 3.1 Macro “Ashift_R” (Arithmetic Shift Right Rin)
 3.2 Macro “Ashift_R_16” (Arithmetic Shift Right Rin)
 3.3 Macro “Lshift_R” (Logical Shift Right Rin)
 3.4 Macro “Lshift_R_16” (Logical Shift Right Rin)
 3.5 Macro “Lshift_L” (Logical Shift Left Rin)
 3.6 Macro “Lshift_L_16” (Logical Shift Left Rin)
 3.7 Macro “shift_R” (Shift Right Rin)
 3.8 Macro “shift_R_16” (Shift Right Rin)
 3.9 Macro “shift_L” (Shift Left Rin)
 3.10 Macro “shift_L_16” (Shift Left Rin)
 3.11 Macro “rotate_R” (Rotate Right Rin)
 3.12 Macro “rotate_R_16” (Rotate Right Rin)
 3.13 Macro “rotate_L” (Rotate Left Rin)
 3.14 Macro “rotate_L_16” (Rotate Left Rin)
 3.15 Macro “Swap” (Swap Rin)
 3.16 Examples for Shift and Rotate Macros

Chapter 4 - Selection Macros  
 4.1 Macro “move_R” (Move)  
 4.2 Macro “load_R” (Load)  
 4.3 Macro “select” (Selection of One of Two 8-Bit Input Variables)  
 4.4 Macro “select_16” (Selection of One of Two 16-Bit Input Variables)  
 4.5 Macro “max_5” (Maximum in Five 8-Bit Variables)  
 4.6 Macro “max_10” (Maximum in Ten 8-Bit Variables)  
 4.7 Macro “max_ N80” (Maximum in N 8-Bit Variables, N = 2, 3, …, 80)  
 4.8 Macro “max_ N40_16” (Maximum in N 16-Bit Variables, N = 2, 3, …, 40)  
 4.9 Macro “max_ N255” (Maximum in N 8-Bit Variables, N = 2, 3, …, 255)  
 4.10 Macro “max_ N255_16” (Maximum in N 16-Bit Variables, N = 2, 3, …, 255)  
 4.11 Macro “min_5” (Minimum in Five 8-Bit Variables)  
 4.12 Macro “min_10” (Minimum in Ten 8-Bit Variables)  
 4.13 Macro “min_ N80” (Minimum in N 8-Bit Variables, N = 2, 3, …, 80)  
 4.14 Macro “min_ N40_16” (Minimum in N 16-Bit Variables, N = 2, 3, …, 40)  
 4.15 Macro “min_ N255” (Minimum in N 8-Bit Variables, N = 2, 3, …, 255)  
 4.16 Macro “min_ N255_16” (Minimum in N 16-Bit Variables, N = 2, 3, …, 255)  
 4.17 Macro “limiter”  
 4.18 Macro “limiter_16”  
 4.19 Multiplexer Macros  
 4.20 Macro “mux_2_1” (21 MUX)  
 4.21 Macro “mux_2_1_E” (21 MUX with Enable Input)  
 4.22 Macro “mux_4_1”  (41 MUX)  
 4.23 Macro “mux_4_1_E” (41 MUX with Enable Input)  
 4.24 Macro “mux_8_1” (81 MUX)  
 4.25 Macro “mux_8_1_E” (81 MUX with Enable Input)  
 4.26 Macro “mux_16_1” (161 MUX)  
 4.27 Macro “mux_16_1_E” (161 MUX with Enable Input)  
 4.28 Macro “B_mux_2_1_E” (21 Byte Multiplexer with Enable Input)  
 4.29 Macro “B_mux_4_1_E” (41 Byte Multiplexer with Enable Input)  
 4.30 Macro “B_mux_8_1_E” (81 Byte Multiplexer with Enable Input)  
 4.31 Examples for Selection Macros  

Chapter 5 - Demultiplexer Macros
 5.1 Macro “Dmux_1_2” (12 DMUX)
 5.2 Macro “Dmux_1_2_E” (12 DMUX with Enable Input)
 5.3 Macro “Dmux_1_4” (14 DMUX)
 5.4 Macro “Dmux_1_4_E” (14 DMUX with Enable Input)
 5.5 Macro “Dmux_1_8” (18 DMUX)
 5.6 Macro “Dmux_1_8_E” (18 DMUX with Enable Input)
 5.7 Macro “Dmux_1_16” (116 DMUX)
 5.8 Macro “Dmux_1_16_E” (116 DMUX with Enable Input)
 5.9 Macro “B_Dmux_1_2_E” (12 Byte DeMultiplexer with Enable Input)
 5.10 Macro “B_Dmux_1_4_E” (14 Byte DeMultiplexer with Enable Input)
 5.11 Macro “B_Dmux_1_8_E” (18 Byte DeMultiplexer with Enable Input)
 5.12 Macro “Dispatcher_1_8_E” (18 Dispatcher with Enable Input)
 5.13 Macro “Patcher_8_1_E” (81 Patcher with Enable Input)
 5.14 Examples for Demultiplexer Macros

Chapter 6 - Decoder Macros (Available as E-Ancillaries)
 6.1 Macro “decod_1_2” (12 Decoder with Active High Outputs)
 6.2 Macro “decod_1_2_AL” (12 Decoder with Active Low Outputs)
 6.3 Macro “decod_1_2_E”  (12 Decoder with Active High Outputs and with Active High Enable Input)
 6.4 Macro “decod_1_2_E_AL” (12 Decoder with Active Low Outputs and with        Active High Enable Input)
 6.5 Macro “decod_2_4” (24 Decoder with Active High Outputs)
 6.6 Macro “decod_2_4_AL”  (24 Decoder with Active Low Outputs)
 6.7 Macro “decod_2_4_E”  (24 Decoder with Active High Outputs and with Active High Enable Input)
 6.8 Macro “decod_2_4_E_AL” (24 Decoder with Active Low Outputs and with   Active High Enable Input)
 6.9 Macro “decod_3_8” (38 Decoder with Active High Outputs)
 6.10 Macro “decod_3_8_AL”  (38 Decoder with Active Low Outputs)
 6.11 Macro “decod_3_8_E” (38 Decoder with Active High Outputs and with Active High Enable Input)
 6.12 Macro “decod_3_8_E_AL” (38 Decoder with Active Low Outputs and with Active High Enable Input)
 6.13 Macro “decod_4_16” (416 Decoder with Active High Outputs)
 6.14 Macro “decod_4_16_AL”  (416 Decoder with Active Low Outputs)
 6.15 Macro “decod_4_16_E” (416 Decoder with Active High Outputs and with    Active High Enable Input)
 6.16 Macro “decod_4_16_E_AL” (416 Decoder with Active Low Outputs and with Active High Enable Input)
 6.17 Examples for Decoder Macros

Chapter 7 - Priority Encoder Macros (Available as E-Ancillaries)
 7.1 Macro “encod_4_2_p” (42 Priority Encoder with Active High Outputs)
 7.2 Macro “encod_4_2_p_E” (42 Priority Encoder with Active High Outputs and
with Active High Enable Input)
 7.3 Macro “encod_8_3_p” (83 Priority Encoder with Active High Outputs)
 7.4 Macro “encod_8_3_p_E” (83 Priority Encoder with Active High Outputs and
with Active High Enable Input)
 7.5 Macro “encod_dec_bcd_p” (Decimal to BCD Priority Encoder with Active High Outputs)
 7.6 Macro “encod_dec_bcd_p_E” (Decimal to BCD Priority Encoder with Active
High Outputs and with Active High Enable Input Input)
 7.7 Macro “encod_16_4_p” (164 Priority Encoder with Active High Outputs)
 7.8 Macro “encod_16_4_p_E” (164 Priority Encoder with Active High Outputs and with Active High Enable Input)
 7.9 Examples for Priority Encoder Macros

Chapter 8 – Conversion Macros
 8.1 Macro “Conv_UsInt_2_BCD_U” (Unsigned Short Integer to Unpacked BCD Conversion)
 8.2 Macro “Conv_UsInt_2_BCD_P” (Unsigned Short Integer to Packed BCD Conversion)
 8.3 Macro “Conv_UInt_2_BCD_U” (Unsigned Integer to Unpacked BCD
Conversion)
 8.4 Macro “Conv_UInt_2_BCD_P” (Unsigned Integer to Packed BCD Conversion)
 8.5 Macro “Conv_BCD_U_2_UInt” (5 Digit Unpacked BCD to Unsigned Integer Conversion)
 8.6 Macro “Conv_BCD_P_2_UInt” (5 Digit Packed BCD to Unsigned Integer Conversion)
 8.7 7-segment LED Displays
 8.8 Macro “Segment_CCD” (Segment_CCD Instruction)
 8.9 Macro “Segment_CAD” (Segment_CAD Instruction)
 8.10 Macro “Conv_Bin_2_Gray” (Binary to Gray Code Conversion)
 8.11 Macro “Conv_Bin_2_Gray_16” (Binary to Gray Code Conversion)
 8.12 Macro “Conv_Gray_2_Bin” (Gray Code to Binary Conversion)
 8.13 Macro “Conv_Gray_2_Bin_16” (Gray Code to Binary Conversion)
 8.14 Examples for Conversion Macros
 8.15 References

Volume III:
Chapter 1 – Program Control Macros
 1.1 Jump Instructions
 1.2 Macro “jump” (Jump to Label)
 1.3 Macro “jumpN” (Jump to Label)
 1.4 Macro “jmp_lst_2” (Jump to One of Two Labels)
 1.5 Macro “jmp_lst_4” (Jump to One of  Four Labels)
 1.6 Macro “jmp_lst_8” (Jump to One of Eight labels)
 1.7 Macro “call_SR” (Call Subroutine)
 1.8 Macro “return_SR” (Return from Subroutine)
 1.9 Macro “FOR” (Beginning of For-Next Loop)
 1.10 Macro “NEXT” (End of For-Next Loop)
 1.11 Macro “clear_WDT” (Clear the Watchdog Timer)
 1.12 Implementation of Master Control Relay (MCR)
 1.13 Examples for Program Control Macros
 1.14 References

Chapter 2 – High Speed Counter and PWM Macros
 2.1 High Speed Counter (HSC) Instruction
 2.2 PWM Overview
 2.3 Using Standard PWM Functions
 2.4 Macro “PWM_RA4v” (A Standard PWM Operation with a Variable Duty Cycle
by Using the RA4 Pin)
 2.5 Macro “PWM_RA4c” (A Standard PWM Operation with a Fixed Duty Cycle by Using the RA4 Pin)
 2.6 Macro “PWM_RA7v” (A Standard PWM Operation with a Variable Duty Cycle
by Using the RA7 Pin)
 2.7 Macro “PWM_RA7c” (A Standard PWM Operation with a Fixed Duty Cycle by Using the RA7 Pin)
 2.8 Some Control Circuits for the Brushed DC Motor
 2.9 Examples for High Speed Counter and PWM Macros
 2.10 References

Chapter 3 – Memory Related Macros
 3.1 Memory Organization of PIC16F1847 Microcontroller
 3.1.1 Flash Program Memory Organization
 3.1.2 Data SRAM Memory Organization
 3.2 Introduction to Memory Read/Write Operations
 3.3 Macro “sram_read” (Read 1 Byte from SRAM Memory)
 3.4 Macro “eeprom_read” (Read 1 Byte from EEPROM Memory to SRAM Memory)
 3.5 Macro “copy_eeprom_to_sram” (Copy N Bytes from EEPROM Memory to
SRAM Memory)
 3.6 Macro “eeprom_write” (Write 1 Byte from SRAM Memory to EEPROM Memory)
 3.7 Macro “write_sram_to_eeprom” (Write N Bytes from SRAM Memory to EEPROM Memory)
 3.8 Macro “prg_mem_read” (Read 1 Word from Flash Program Memory)
 3.9 Macro “copy_prgmem_to_sram” (Copy N Bytes from Flash Program Memory to SRAM Memory)
 3.10 Macro “prg_mem_erase” (Erase N Rows of Flash Program Memory)
 3.11 Macro “write_B_sram_to_prgmem” (Write Bytes from SRAM Memory to Flash Program Memory)
 3.12 Macro “write_W_sram_to_prgmem” (Write Words from SRAM Memory to Flash Program Memory)
 3.13 Macro “fill_sram_N80” (Fill up to 80 Variables with Values in a Bank)
 3.14 Macro “fill_sram_N255” (Fill up to 255 Variables with Values in SRAM Memory)
 3.15 Examples for Memory Related Macros
 3.16 Reference

Chapter 4 – Drum Sequencer Instruction
 4.1 Implementation of the Drum Sequencer Instruction
 4.2 Examples for the Drum Sequencer Instruction
 4.3 References

Chapter 5 – Sequential Function Charts
 5.1 Introduction to SFC
 5.2 Implementation of SFC Elements
 5.3 References

Chapter 6 – Analog Input Modules and Analog Output Modules (Available as E-Ancillaries)
 6.1 Analog Input Modules
 6.2 Analog Output Modules
 6.3 Example 6.1 – Test Program for Analog Input Modules
 6.4 Test Circuits for Analog Input Modules
 6.5 Example 6.2 – Test Program for Analog Output Modules
 6.6 Test Circuits for Analog Output Modules
 6.7 Example 6.3 – Test Program for Using Analog Output Modules together with the PWM Output PWM_RA4
 6.8 Test Circuits for Using Analog Output Modules together with the PWM Output PWM_RA4
 6.9 References

Appendix A - List of Components for Boards and Modules (Available as E-Ancillaries)
 Table A.1. Some example universal double sided prototyping printed circuit boards (PCBs) that can be used for the modules developed in this book
 Table A.2. List of components for the BC337 based NPN transistor module
 Table A.3. List of components for the TIP142 based NPN Darlington power transistor module
 Table A.4. List of components for the IRL540N based N-Channel power MOSFET module
 Table A.5. List of components for the 1-channel optical isolation module
 Table A.6. List of components for the 2-channel optical isolation module
 Table A.7. List of components for the H-bridge circuit with two relays
 Table A.8. List of components for the 0V to 5V Analog Input Module 1
 Table A.9. List of components for the 0V to 5V Analog Input Module 2
 Table A.10. List of components for the 0V to 5V Analog Input Module 3
 Table A.11. List of components for the 0V to 5V Analog Input Module 4
 Table A.12. List of components for the 0V to 5V Analog Input Module 5
 Table A.13. List of components for the 0-10V to 0-5V Signal Converter - Analog Input Module 1
 Table A.14. List of components for the 0-10V to 0-5V Signal Converter - Analog Input Module 2
 Table A.15. List of components for the 5V - +5V to 0-5V Signal Converter - Analog Input Module 1
 Table A.16. List of components for the 5V - +5V to 0-5V Signal Converter - Analog Input Module 2
 Table A.17. List of components for the 10V - +10V to 0-5V Signal Converter –
Analog Input Module 1
 Table A.18. List of components for the 10V - +10V to 0-5V Signal Converter –
Analog Input Module 2
 Table A.19. List of components for the 0-5V or 4-20mA to 0-5V Signal Converter - Analog Input Module 1
 Table A.20. List of components for the 0-5V or 4-20mA to 0-5V Signal Converter - Analog Input Module 2
 Table A.21. List of components for the 0V to 5V Analog Output Module
 Table A.22. List of components for the 0-5V to 0-10V Signal Converter – Analog
Output Module
 Table A.23. List of components for the 0-5V to 5V - +5V Signal Converter - Analog
Output Module 1
 Table A.24. List of components for the 0-5V to 5V - +5V Signal Converter - Analog
Output Module 2
 Table A.25. List of components for the 0-5V to 10V - +10V Signal Converter -
Analog Output Module 1
 Table A.26. List of components for the 0-5V to 10V - +10V Signal Converter -
Analog Output Module 2
 Table A.27. List of components for the 0-5V to 4-20mA Signal Converter - Analog Output Module

O autorze

Murat Uzam was borned in Söke, Turkey, in 1968. He received the B.Sc. and M.Sc. degrees from Electrical Engineering Department, Yıldız Technical University, İstanbul, Turkey, 1989 and 1991, respectively, and the Ph.D. degree from University of Salford, Salford, U.K., in 1998. He was with Nigde University, Turkey, from 1993 to 2010 in the Department of Electrical and Electronics Engineering as a Research Assistant, Assistant Professor, Associate Professor and Professor. He was a Professor in the Department of Electrical and Electronics Engineering, at Melikşah University in Kayseri, Turkey from 2011 to 2016. He was a Visiting Researcher with INRIA, University of Metz and University of Rennes, France, in 1999, with University of Toronto, Toronto, ON, Canada, in 2003, and with Xidian University, Xi’an, China, in 2013, 2015 and 2019. Since 15 April 2020, he has been serving as a Professor in the Department of Electrical and Electronics Engineering, at Yozgat Bozok University in Yozgat, Turkey. He has published 50 conference papers and 85 journal and magazine papers, 70 of which are indexed by Science Citation Index Expanded (SCIE). He has published two books in Turkish and one book in English by CRC Press (Taylor & Francis Group). According to Publons, his H-Index is 15 and his papers have been cited 1269 times by the papers indexed in the SCIE. His current research interests include design and implementation of discrete event control systems modeled by Petri nets and, in particular, deadlock prevention/liveness enforcing in flexible manufacturing systems, programmable logic controllers (PLCs), microcontrollers (especially PIC microcontrollers), and design of microcontroller-based PLCs. Dr. Uzam has been serving as a reviewer for prestigious journals and conferences. According to Publons, the number of his verified reviews is 70.