On-Chip Inductive Interconnects : Design Methodologies

ISBN-13: 9783639157246 / Angielski / Miękka / 2009 / 308 str.

Magdy El-Moursy

Opis

With the decrease in feature size of CMOS integrated circuits, interconnect design has become an important issue in high speed, high complexity integrated circuits. Different design methodologies have been proposed to improve circuit performance. Wire sizing, driver sizing, repeater insertion, and wire shaping are common techniques to enhance circuit performance. With increasing signal frequencies and the corresponding decrease in signal transition times, the interconnect impedance can behave inductively. Line inductance introduces new tradeoffs in interconnect design and driver sizing to decrease the circuit delay. Different design methodologies under an inductive environment are described in this book. Including line inductance in the design process can enhance both the delay and power as well as improve the accuracy of the overall design process. By including the on-chip inductance, the efficiency of different circuit design techniques such as wire sizing, driver sizing, repeater insertion, and line tapering can be greatly enhanced.

O autorze

Magdy A. El-Moursy BS''96 and MS''00 Cairo University, Egypt and
MS''02 and PhD''04 University of Rochester, NY, USA,
STMicroelectronics, USA (03), Senior Design Engineer, Intel
Corporation, OR, USA (04-06), Assistant Professor, German
University in Cairo, Egypt (06-08), technical lead,
Hardware Emulation Division, Mentor Graphics Corporation.