Nanoscale CMOS VLSI Circuits: Design for Manufacturability

ISBN-13: 9780071635196 / Angielski / Twarda / 2010 / 316 str.

Kundu Sandip;Sreedhar Aswin

Opis

Cutting-Edge CMOS VLSI Design for Manufacturability Techniques This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource. Nanoscale CMOS VLSI Circuits covers:

• Current trends in CMOS VLSI design
• Semiconductor manufacturing technologies
• Photolithography
• Process and device variability: analyses and modeling
• Manufacturing-Aware Physical Design Closure
• Metrology, manufacturing defects, and defect extraction
• Defect impact modeling and yield improvement techniques
• Physical design and reliability
• DFM tools and methodologies

Spis treści

1. Introduction
1.1. Current trends in CMOS VLSI Design
1.2. What is Design for Manufacturability
1.2.1. Why is its important
1.2.2. Economics of DFM
1.3. What is Design for Reliability
1.3.1. Traditional definition
1.3.2. Expanded definition
1.3.3. Why is this an important topic
1.4. Summary
2. Semiconductor Manufacturing
2.1. Introduction
2.2. Fabrication Process
2.3. Lithography Simulation
2.3.1. Fraunhofer Diffraction
2.3.2. Aerial Image Formation
2.4. Importance of Aerial imaging simulation
2.5. Inverse Lithography Simulation
2.6. Summary
3. Lithographic Process Variability
3.1. Introduction
3.2. Variability in Gate Length & Width
3.3. Threshold Voltage Variability
3.4. Metal CMP
3.5. Interconnect linewidth variation
3.6. Interconnect LER
3.7. Summary
4. Lithographic Control
4.1. Introduction
4.2. Physical design rules check
4.2.1. The end of Boolean Rule-based checks
4.2.2. Model-based design rule checks
4.2.3. Cost vs accuracy of model-based checks
4.3. Resolution Enhancement Techniques (RET)
4.3.1. Proximity Correction & SRAFs
4.3.2. Phase shift Masking
4.3.3. Off-Axis Illumination

O autorze

Dr. Sandip Kundu is a professor in the Electrical and Computer Engineering Department at the University of Massachusetts at Amherst, specializing in semiconductor and lithographic manufacturing. Dr. Aswin Sreedhar is a research assistant at the Electrical and Computer Engineering Department at the University of Massachusetts.