Modular Low-Power, High-Speed CMOS Analog-To-Digital Converter of Embedded Systems

ISBN-13: 9781402073809 / Angielski / Twarda / 2003 / 254 str.

Lenn W. Schramm; Keh-La Lin; Armin Kemna

Opis

One of the main trends of microelectronics is toward design for integrated systems, i.e., system-on-a-chip (SoC) or system-on-silicon (SoS). Due to this development, design techniques for mixed-signal circuits become more important than before. Among other devices, analog-to-digital and digital-to-analog converters are the two bridges between the analog and the digital worlds. Besides, low-power design technique is one of the main issues for embedded systems, especially for hand-held applications. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems aims at design techniques for low-power, high-speed analog-to-digital converter processed by the standard CMOS technology. Additionally this book covers physical integration issues of A/D converter integrated in SoC, i.e., substrate crosstalk and reference voltage network design.

Recenzje

From the reviews:

"Design methodologies that allow the improvement of both reusability and modularity of the analog part are particularly appealing. This book, which covers the design and optimization of A/D converters, is particularly suited in this scenario. ... The book is for a wide range of readers. It can be used not only by specialists but also by integrated circuits designers and general microelectronics engineers, as well as postgraduate students." (Gaetano Palumbo, IEEE Circuits & Devices Magazine, Vol. 21 (3), May/June, 2005)

Spis treści

Foreword. List of Figures. List of Tables. 1: Introduction. 1.1. Motivation. 1.2. Organization of the Book. 2: Analog-to-Digital Conversion. 2.1. Concepts of A/D Conversion and D/A Conversion. 2.2. Sampling Theorem of the A/D Conversion. 2.3. Quantization Process of the A/D conversion. 2.4. Performance of A/D Converters. 2.5. Topologies and Architectures of High-Speed A/D Converters. 2.6. Problems of Embedded System with A/D Converter. 2.7. Summary. 3: Components for CMOS Folding and Interpolating A/D Converters. 3.1. Subsystem: Sample-and-Hold Amplifier. 3.2. High-Speed Operational Transconductance Amplifier. 3.3. Subsystem: Fine Converter. 3.4. Subsystem: Coarse Converter. 3.5. Comparator Stage. 3.6. Digital Signal Processing: Error Correction. 3.7. Digital Signal Processing: Algorithm for Binary Coding. 3.8. Subsystem: Synchronization. 4: Architecture and Design of CMOS Folding and Interpolating A/D Converters. 4.1. Introduction. 4.2. Architecture Optimization. 4.3. Design and Implementation of the 10-Bit Folding and Interpolating A/D Converter. 4.4. Architectural Scalability of the Folding and Interpolating A/D Converter. 4.5. Architecture Analysis for the 10-Bit Folding and Interpolating A/D Converter. 4.6. Architectural Hard Scaling. 4.7. Summary. 5: Physical Design of Low-Power, High Embedded CMOS A/D Converter. 5.1. Power Supply Network. 5.2. Reference Voltage Network. 5.3. Noise Coupling. 5.4. Summary of Recommended Design Practices for Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems. 6: Evaluation and Measurements. 6.1. Methodology for Analog Measurement. 6.2. Methodology for Digital Measurement. 6.3. Measurement Results. 6.4. Summary. 7: General Conclusions and Outlook. Appendix A: Analysis for Small Signal Operation. Appendix B: Source Codes for Binary Coding. Appendix C: Test Results: Folding ADC vs. AD9203. Symbols, Conventions, Notations, and Abbreviations. Index. Bibliography.