Low Power Design in Deep Submicron Electronics

ISBN-13: 9780792381037 / Angielski / Miękka / 1997 / 580 str.

Nebel; Wolfgang Nebel; Jean P. Mermet

Opis

Low Power Design in Deep Submicron Electronics deals with the different aspects of low power design for deep submicron electronics at all levels of abstraction from system level to circuit level and technology. Its objective is to guide industrial and academic engineers and researchers in the selection of methods, technologies and tools and to provide a baseline for further developments. Furthermore the book has been written to serve as a textbook for postgraduate student courses. In order to achieve both goals, it is structured into different chapters each of which addresses a different phase of the design, a particular level of abstraction, a unique design style or technology. These design-related chapters are amended by motivations in Chapter 2, which presents visions both of future low power applications and technology advancements, and by some advanced case studies in Chapter 9.
From the Foreword:
... This global nature of design for low power was well understood by Wolfgang Nebel and Jean Mermet when organizing the NATO workshop which is the origin of the book. They invited the best experts in the field to cover all aspects of low power design. As a result the chapters in this book are covering deep-submicron CMOS digital system design for low power in a systematic way from process technology all the way up to software design and embedded software systems.
Low Power Design in Deep Submicron Electronics is an excellent guide for the practicing engineer, the researcher and the student interested in this crucial aspect of actual CMOS design. It contains about a thousand references to all aspects of the recent five years of feverish activity in this exciting aspect of design.'
Hugo de Man
Professor, K.U. Leuven, Belgium
Senior Research Fellow, IMEC, Belgium

Spis treści

1. Introduction; W. Nebel. 2. Application and Technology Forecast; D.J. Frank. 3. Low Power Design Flow and Libraries; M. Laurent, M. Briet. 4. Low Power Circuit and Logic Level Design. 4.1. Modeling; J. Figueras. 4.2. Circuit and Logic Level Design; C. Piguet. 4.3. Power Estimation at the Logic Level; W. Nebel. 4.4. Advanced Power Estimation Techniques. 5. Power Optimization. 5.1. Layout Optimization; J. Cong, et al. 5.2. Combinational Circuit Optimization; S. Iman, M. Pedram. 5.3. Sequential Synthesis and Optimization for Low Power; E. Macii. 5.4. RT and Algorithmic-Level Optimization for Low Power; E. Macii. 5.5. High Level Synthesis for Low Power; E. Macii. 6. System Level Low Power Design. 6.1. Embedded System Design; S.B. Furber. 6.2. Power Analysis and Design at System Level; K. Roy. 6.3. Software Design for Low Power; K. Roy, M.C. Johnson. 7. Asynchronous Design; S.B. Furber. 8. Low Voltage Technologies; C. Svensson. 9. Case Studies. 9.1. Microprocessor Design; C. Piguet. 9.2. Low Power Applications at System level; L. Claesen, et al. Index.