Introduction to Reconfigurable Computing: Architectures, Algorithms, and Applications

ISBN-13: 9781402060885 / Angielski / Twarda / 2007 / 388 str.

Christophe Bobda

Opis

Introduction in Reconfigurable Computing provides a comprehensive study of the field Reconfigurable Computing. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field of reconfigurable computing, from the early Estrin s machine to the very modern architecture like coarse-grained reconfigurable device and the embedded logic devices. Apart from the introduction and the conclusion, the main chapter of the book are the following:

• Architecture of reconfigurable systems, which presents the technology and the architecture used in fined-grained and those used in coarse-grained reconfigurable devices.
• Design and implementation: This section deals with the implementation on reconfigurable system. It briefly covers the steps needed to implement application on today's FPGAs. And focus on the logic synthesis for FPGA, in particular LUT technology mapping.
• High-Level Synthesis for Reconfigurable Devices: The high-level synthesis for reconfigurable systems, also known as temporal partitioning is presented here. Several temporal partitioning techniques are presented and explained.
• Temporal placement: This section considers stand alone reconfigurable systems. Its assume that a kind of operating systems for reconfigurable systems is in charge of managing the resources of a given system and allocate space on a device for the computation of incoming tasks., and therefore presents several temporal placement approaches for off-line as well as on-line placement.
• On-line and Dynamic Interconnection: This chapter reviews and explains the different approaches for allowing communication between modules dynamically placed at run-time on a given device.
• Designing a reconfigurable application on Xilinx Virtex FPGA: In this section, the different design approaches of partial reconfigurable systems on the Xilinx FPGAs that are one of the few one on the market with this feature, is explained.
• System on programmable chip: System on programmable chip is a hot topic in reconfigurable computing. This is mainly the integration of a system made upon some peripheral (UART, Ethernet, VGA, etc.), but also computational (Coding, filter, etc.) hardware modules on one programmable chip. The current usable solutions are presented: The book furthermore focusses on the development of adaptive multiprocessors on chip, i.e. systems consisting of a set of Processors and exchangeable hardware accelerators.
• Applications: This part covers the use of reconfigurable system in computer architecture (rapid prototyping, reconfigurable supercomputer, reconfigurable massively parallel computers) and algorithm better adapted for reconfigurable systems (distributed arithmetic, network packet processing, etc...)

"

Recenzje

The book by Christophe Bobda, however, has also been written for people with a software background, substantially reducing the educational leap by bridging the gap. His book has the potential to become a best-seller and to stimulate the urgently needed transformation of the software developer population's mind set, by playing a similar role as known from the famous historic Mead-&-Conway textbook for the VLSI design revolution.
Reiner Hartenstein, IEEE fellow,
Professor, TU Kaiserslautern "

Spis treści

Foreword. Preface. List of Figures. List of Tables. 1. INTRODUCTION. 1 General Purpose Computing. 2 Domain Specific Processors. 3 Application Specific Processors. 4 Reconfigurable Computing. 5 Fields of Application. 6 Organization of the book. 2. RECONFIGURABLE ARCHITECTURES. 1 Early Work. 2 Simple Programmable Logic Devices. 3 Complex Programmable Logic Device. 4 Field Programmable Gate Arrays. 5 Coarse-grained reconfigurable devices. 6 Conclusion. 3. IMPLEMENTATION. 1 Integration. 2 FPGA Design Flow. 3 Logic Synthesis. 4 Conclusion. 4. HIGH-LEVEL SYNTHESIS FOR RECONFIGURABLE DEVICES. 1 Modelling. 2 Temporal partitioning algorithms. 3 Conclusion. 5. TEMPORAL PLACEMENT. 1 Off-Line Temporal Placement. 2 On-Line Temporal Placement. 3 Managing the Device’s Free Space with Empty Rectangles. 4 Managing the Device’s Occupied Space. 5 Conclusion. 6. ON-LINE COMMUNICATION. 1 Direct Communication. 2 Communication Over Third Party. 3 Bus-based Communication. 4 Circuit Switching. 5 Network on Chip. 6 The Dynamic Network on Chip (DyNoC). 7 Routing Packets. 8 Analysis of efficiency. 9 DyNoC Implementation on FPGAs. 10 Conclusion. 7. PARTIAL RECONFIGURATION DESIGN. 1 Partial Reconfiguration on Virtex Devices. 2 Bitstream Manipulation with JBits. 3 The Modular Design Flow. 4 The Early Access Design Flow. 5 Creating partially reconfigurable designs. 6 Partial Reconfiguration using Handel-C Designs. 7 Platform design. 8 Enhancement in the Platform Design. 9 Conclusion. 8. SYSTEM ONA PROGRAMMABLE CHIP. 1 Introduction to SoPC. 2 Adaptive Multiprocessing on Chip. 3 Conclusion. 9. APPLICATIONS. 1 Pattern Matching. 2 Video Streaming. 3 Distributed Arithmetic. 4 Adaptive controller. 5 Adaptive Cryptographic Systems. 6 Software Defined Radio. 7 High Performance Computing. 8 Conclusion References. Appendices. A Hints to Labs. 1 Prerequisites. 2 Reorganization of the project Video8nonpr. B Party. C QuickPart-YTutorial.

O autorze

Dr. Christophe Bobda is Associate Professor in the Department of Computing Science at Kaiserslautern University of Technology in Germany

Blurb

“Introduction to Reconfigurable Computing” provides a comprehensive study of the field Reconfigurable Computing. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field of reconfigurable computing, from the early Estrin’s machine to the very modern architecture like coarse-grained reconfigurable device and the embedded logic devices. Apart from the introduction and the conclusion, the main chapters of the book are the following:

-Architecture of reconfigurable systems, which presents the technology and the architecture used in fine-grained and those used in coarse-grained reconfigurable devices.

-Design and implementation: This section deals with the implementation on reconfigurable system. It briefly covers the steps needed to implement application on today's FPGAs. And focus on the logic synthesis for FPGA, in particular LUT technology mapping.

-High-Level Synthesis for Reconfigurable Devices: The high-level synthesis for reconfigurable systems, also known as temporal partitioning is presented here. Several temporal partitioning techniques are presented and explained.

-Temporal placement: This section considers stand alone reconfigurable systems. Its assume that a kind of operating systems for reconfigurable systems is in charge of managing the resources of a given system and allocate space on a device for the computation of incoming tasks., and therefore presents several temporal placement approaches for off-line as well as on-line placement.

-On-line and Dynamic Interconnection: This chapter reviews and explains the different approaches for allowing communication between modules dynamically placed at run-time on a given device.

-Designing a reconfigurable application on Xilinx Virtex FPGA: In this section, the different design approaches of partial reconfigurable systems on the Xilinx FPGAs that are one of the few on the market with this feature, are explained.

-System on programmable chip: System on programmable chip is a hot topic in reconfigurable computing. This is mainly the integration of a system made upon some peripheral (UART, Ethernet, VGA, etc.), but also computational (Coding, filter, etc.) hardware modules on one programmable chip. The current usable solutions are presented: The book furthermore focuses on the development of adaptive multiprocessors on chip, i.e. systems consisting of a set of Processors and exchangeable hardware accelerators.

-Applications: This part covers the use of reconfigurable system in computer architecture (rapid prototyping, reconfigurable supercomputer, reconfigurable massively parallel computers) and algorithm better adapted for reconfigurable systems (distributed arithmetic, network packet processing, etc...).