ISBN-13: 9786202316811 / Angielski / Miękka / 2018 / 76 str.
MGDI technique, in which a low number of transistors are used to reduce the power consumption and area on chip of digital circuits. In this paper the full adder is introduced using MGDI technique. 2 bit comparator, full subtractor were introduced using GDI technique. Then these digital circuits were compared with traditional CMOS transistors in terms of power dissipation, number of transistors, area, speed and delay.