1. CMOS and Beyond CMOS: Scaling Challenges2. Opportunities for high mobility materials integrated on a Si platform3. Monolithic integration of InGaAs on Si(001) substrate for Logic devices4. III-N epitaxy on Si for power electronics5. Impact of defects on the performance of high-mobility semiconductor devices6. (Si)Ge devices7. III-V Devices and Technology for CMOS8. Beyond CMOS9. Optoelectronic devices integrated on silicon10. High mobility devices for digital applications
Nadine Collaert has been involved in the theory, design, and technology of FinFET-based multi-gate devices, emerging memory devices, transducers for biomedical applications and the integration and characterization of biocompatible materials e.g. carbon-based materials.
From 2012 until April 2016 she was program manager of the imec LOGIC program, focusing on high mobility channels, TFET and nanowires.
Since April 2016 she is a distinguished member of technical staff responsible for the research on novel CMOS scaling approaches based on heterogeneous integration of new materials with Si and new material-enabled device and system approaches to increase functionality.
She has authored or coauthored more than 300 papers in international journals and conference proceedings. She has been a member of the CDT committee of the IEDM conference and she is still a member of the Program Committees of the international conferences ESSDERC and ULIS/EUROSOI. Nadine Collaert has been involved in the theory, design, and technology of FinFET-based multi-gate devices, emerging memory devices, transducers for biomedical applications and the integration and characterization of biocompatible materials e.g. carbon-based materials.