HYBRID STORAGE CLASS MEMORIES SYSTEMS

ISBN-13: 9786203911084 / Angielski / Miękka / 80 str.

Y. Lavanya; L. Bharathi; P Bhagyasree

Opis

In this project the design of secure double integrity check system using hybrid storage class memories is implemented. Basically, the integrated chips are very complicated to increase the density of chip and decrease the size of chip. So to overcome this SCM array is implemented. Migration handler will handle the memories like non volatile memory and Dynamic random access memory. The memory controller bank will control the saved data following from NVM and DRAM manager. Now, this saved data will get mixed up by using double integrity controller. In this read and write operations are performed based on the W-SCM and R-SCM. At last the obtained data will be saved in memory cache bank. Hence from results it can observe that the hybrid SCM will reduce the delay in effective way.KEY WORDS: Random Access Memory (RAM), SCM (Storage Class Memories), Dynamic Random Access Memory (DRAM), Non Volatile Memory (NVM), W-SCM (Write Storage Class Memories) and R-SCM (Read Storage Class Memories).

O autorze

Lavanya, Y. Mrs. Y. Lavanya completed her B.Tech from Kuppam Engineering College, Kuppam in the year 2007 and completed M.Tech in the Year 2013. At present, she is working as Associate Professor in Department of ECE, Ramachandra College of Engineering, Eluru. She has 12 years of excellent teaching experience and published several research papers