Fault Tolerant Reversible Multiplier

ISBN-13: 9783659248801 / Angielski / Miękka / 2012 / 76 str.

Opis

This book name shows the value of work, now a days power dissipation is one of important parameter by using this work the efficiency of the circuit increases and garbage's and constants decreases. in 2020 this project work will use in laptops to reduce the laptop heat up time. Hence the main challenge would be to handle complex circuits on classical computer and designing better reversible fault tolerant circuits. Designing algorithms for reversible computer also seem to be an exciting field of research. The prospect for further research includes garbage reduction to reduce hardware requirement and the reversible implementation of more complex arithmetic circuits such as function evaluation and multiplicative division circuits using this multiplier.

O autorze

Er. Nidhi Syal : Working as Lecturer in Chandigarh Group of Colleges Landran, Mohali, Punjab, India,I did my M-tech from MMU Mullana Haryana and Btech from IET Bhaddal Ropar. I published 15 papers in journals and also co-author of one book.