Electronics Production Defects and Analysis

ISBN-13: 9789811698231 / Angielski / Twarda / 2022

Oommen Tharakan Kuttiyil Thomas;Padma Padmanabhan Gopalan

Opis

This book is a unique book capturing defects that are frequently encountered during various fabrication phases of electronic packages. These defects have been analyzed to their root cause and mitigation techniques and presented in the book. The book includes 228 cases with more than 480 color and magnified images of the defects. These defects are covered under eight subheads, viz soldering defects, PCB defects, mounting defects, conformal coating and potting defects, EEE component defects, workmanship defects, defects due to usage of non-FFF components, and defects in CAD layout. The possible reasons for the occurrence of the defects and the methods/practices by which they can be eliminated/mitigated have also been discussed. The chapter "mounting defects" shows the correct approach in the adjacent photograph, so that the users can refer to the right procedures. The book is helpful to those who are involved in the production of electronics packages to familiarize them with the different cases shown carefully and revised frequently. Exposure to the different defects is useful to all who are working in fabrication and quality control to realize a zero-defect product sans much time and investment. The book is valuable for the technical community working for aerospace applications, industry partners in the realization of space programs, aerospace, and high-reliability institutions, various electronic fabrication agencies in the country, engineers and technicians taking up courses in high-reliability soldering and fabrication techniques, and the students.

Spis treści

Chapter 1: Introduction.- Chapter 2: Soldering Defects.- Chapter 3: PCB Defects.- Chapter 4: Mounting Defects.- Chapter 5: Conformal Coating and Potting Defects.- Chapter 6: EEE Component Defects.- Chapter 7: Workmanship Defects.- Chapter 8: Defects due to the usage of Non-FFF Components.- Chapter 9: Defects in CAD Layout.

O autorze

Dr. Oommen Tharakan Kuttiyil Thomas holds B.Tech. degree in Electronics & Communication Engineering from College of Engineering, Trivandrum (University of Kerala), M.E. in Electrical Communication Engineering (VLSI devices & Simulation) from Indian Institute of Science, Bangalore, and Ph.D. from the Department of Electrical Engineering (Microelectronics and VLSI Design), Indian Institute of Technology Bombay, Mumbai. Currently, he is Group Director in the Avionics Entity of Vikram Sarabhai Space Centre, Trivandrum. He has been working in the space center since 1985. His areas of interest are Design and Verification of VLSI systems, Test vector generation for FPGAs, Microprocessors, VLSI devices, Formal verification of Hardware Description Languages, Indigenisation of Electronic components and Quality Control of Avionics packages for launch vehicle application. He has numerous International and National papers and has published in various journals. He has also published and presented papers at International Conferences. His papers have been cited in the various Journals/ Books.

Padma Padmanabhan Gopalan took her Engineering Diploma in Electronics from Government Women's Polytechnic Coimbatore, in 1981. She joined Vikram Sarabhai Space Centre, Trivandrum, in December 1982 as Technical Assistant. She has also worked as Section Head of the Production Division. Currently, she is Division Head of Quality Control and Inspection Division in Avionics Entity.