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Effective Functional Verification: Principles and Processes

ISBN-13: 9781461498360 / Angielski / Miękka / 2014 / 256 str.

Srivatsa Vasudevan
Effective Functional Verification: Principles and Processes Vasudevan, Srivatsa 9781461498360 Springer - książkaWidoczna okładka, to zdjęcie poglądowe, a rzeczywista szata graficzna może różnić się od prezentowanej.

Effective Functional Verification: Principles and Processes

ISBN-13: 9781461498360 / Angielski / Miękka / 2014 / 256 str.

Srivatsa Vasudevan
cena 403,47 zł
(netto: 384,26 VAT:  5%)

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Effective Functional Verification is organized into 4 parts. The first part contains 3 chapters designed appeal to newcomers and experienced people to the field. There is a survey of various verification methodologies and a discussion of them. The second part with 3 chapters is targeted towards people in management and higher up on the experience ladders. New verification engineers reading these chapters learn what is expected and how things work in verification. Some case studies are also presented with analysis of proposed improvements. The last two parts are the result of experience of several years. It goes into how to optimize a verification plan and an environment and how to get results effectively. Various subjects are discussed here to get the most out of a verification environment. Lastely, the appendix discusses some tool specifics to help remove repetitive work and also some tool specific guidelines. While reading Effective Functional Verification, one will be able to get a jump start on planning and executing a verification plan using the concepts presented.

Kategorie:
Technologie
Kategorie BISAC:
Technology & Engineering > Electronics - Circuits - General
Technology & Engineering > Mechanical
Technology & Engineering > Electrical
Wydawca:
Springer
Język:
Angielski
ISBN-13:
9781461498360
Rok wydania:
2014
Wydanie:
2006
Ilość stron:
256
Waga:
0.43 kg
Wymiary:
23.5 x 15.5
Oprawa:
Miękka
Wolumenów:
01
Dodatkowe informacje:
Wydanie ilustrowane

Dedication. List of Figures. Foreword. Preface. Acknowledgments. Part I Starting the Verification Journey. 1. An Introduction to IC Verification. Importance of Verification. Overview of a Typical ASIC Design Process. Factors in Successful Verification. References. 2. Approaches to Verification. What is Functional Verification all About? Stimulating the design - A choice of approaches. Verification Approaches Based on Integration. Instruction Driven Verification. Random Testing. Coverage Driven Verification. Transaction Based Verification. Golden Model Approach. Pre-Post Processing Approach. Assertion Based Verification. Formal Verification. Emulation and Acceleration. References. 3. Various Workflows Practiced in Verification. An Overview of the Entire Verification Process. The Planning Process. The Regression Process. Maturing of the Design. The Periodic Review Process. The Verification Signoff Process. Part II Ingredients of Successful Verification. 4. People Make all the Difference. Team Dynamics and Team Habits for Success. The Six Qualitites of Successful Verification Engineers. References. 5. Case Studies from the Real World. Block and System Level Tests use Unrelated Environments. Not Implementing Monitors and Assertions Early on. Review Processes Not Done Timely. Pure Random Testing Without Directed Tests. Not Running a Smoke Test Before a Regression. Lint Policies. Effective Use of a Source Control Strategy. 6. Tracking results that matter. Why do we ever need any Verification Metrics? Metrics in a Regression. Commonly used Metrics. Functional Coverage Metrics. Structural Coverage Metrics. Assertion Verification Metrics. References. Part III Reducing work in Verification. 7. Reducing Work in Verification. Considerations in a Verification Environment. Tri-State Buses and Dealing with Them. Dealing with Internal Signals. Environmental Considerations. Dealingwith Register Programming. Dealing with Clocks. Driving the Design. Debugging the Design. Code Profiling to Keep the Inefficiency Out. Regression Management. QC Processes to run a Clean Run. Using a Data Profile to Speed up Simulations. Getting the Machine to Document for You. Keeping an Eye on the Design - Monitors. Checkers in an Environment. Linting Code. The RTL Acceptance Criterion. References. Part IV Ten Steps to Success. 8. Ten Steps to Success. Steps 1 Step 1: A Specification Review. Step 2: The Identification of Test Objects. Step 3: Review of the Test Object List. Step 4: Tagging the List of Test Objects. Step 5: Test Case Identification. Step 6: The Definition of a Correctness Strategy. Step 7: The test strategy. Step 8: Testing the design. Step 9: Figuring out where you Are in the Process. Step 10: Correlations on completion to sign-off. References. Appendices. Index.

Degree in EE from Bangalore University, India in 1990, and Iowa State University, Ames IA, USA in 1993. Formerly a Member of Group Technical Staff at Texas Instruments. Currently Engineer, Senior Staff/Manager at Qualcomm Inc.

Vasudevan, Srivatsa Degree in EE from Bangalore University, India in 1... więcej >


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