Designing Digital Computer Systems with Verilog

ISBN-13: 9780521828666 / Angielski / Twarda / 2005 / 176 str.

David J. Lilja; Sachin S. Sapatnekar

Opis

Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.

Spis treści

Preface; 1. Controlling complexity; 2. A verilogical place to start; 3. Defining the instruction set architecture; 4. Algorithmic behavioral modeling; 5. Building an assembler for VeSPA; 6. Pipelining; 7. Implementation of the pipelined processor; 8. Verification; Appendix A: the VeSPA instruction set architecture (ISA); Appendix B: the VASM assembler; Index.